M95128-DFDW6TP STMicroelectronics, M95128-DFDW6TP Datasheet - Page 18

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M95128-DFDW6TP

Manufacturer Part Number
M95128-DFDW6TP
Description
EEPROM Automotive 128kBit SPI High Speed Clock
Manufacturer
STMicroelectronics
Datasheet

Specifications of M95128-DFDW6TP

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0
Instructions
6.3
6.3.1
18/49
Figure 9.
Read Status Register (RDSR)
The Read Status Register (RDSR) instruction is used to read the Status Register. The
Status Register may be read at any time, even while a Write or Write Status Register cycle
is in progress. When one of these cycles is in progress, it is recommended to check the
Write In Progress (WIP) bit before sending a new instruction to the device. It is also possible
to read the Status Register continuously, as shown in
Figure 10. Read Status Register (RDSR) sequence
The status and control bits of the Status Register are as follows:
WIP bit
The Write In Progress (WIP) bit indicates whether the memory is busy with a Write or Write
Status Register cycle. When set to 1, such a cycle is in progress, when reset to 0, no such
cycle is in progress.
S
C
D
Q
Write Disable (WRDI) sequence
0
High Impedance
1
S
C
D
Q
2
Instruction
3
4
5
Doc ID 5798 Rev 16
6
7
MSB
High Impedance
0
7
8
1
6
Status Register Out
9 10 11 12 13 14 15
2
5
Instruction
3
4
4
3
5
2
6
Figure
1
7
M95128-W M95128-R M95128-DF
0
MSB
7
10.
6
Status Register Out
AI03750D
5
4
3
2
1
0
7
AI02031E

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