M24C04-FMC5TG STMicroelectronics, M24C04-FMC5TG Datasheet - Page 16

• Manufacturer Part Number: M24C04-FMC5TG
• Description: EEPROM 4Kbit 100kHz I2C 400 kHZ Fast-Mode
• Manufacturer: STMicroelectronics

Specifications of M24C04-FMC5TG

• Product Category: EEPROM
• Rohs: yes

Instructions
5.1.3
16/32
Minimizing Write delays by polling on ACK
The maximum Write time (t
parameters, but the typical time is shorter. To make use of this, a polling sequence can be
used by the bus master.
The sequence, as shown in
●
●
●
Figure 7.
First byte of instruction
with RW = 0 already
decoded by the device
Initial condition: a Write cycle is in progress.
Step 1: the bus master issues a Start condition followed by a device select code (the
first byte of the new instruction).
Step 2: if the device is busy with the internal Write cycle, no Ack will be returned and
the bus master goes back to Step 1. If the device has terminated the internal Write
cycle, it responds with an Ack, indicating that the device is ready to receive the second
part of the instruction (the first byte of this instruction having been sent during Step 1).
Write cycle polling flowchart using ACK
ReStart
Stop
NO
w
Figure
) is shown in AC characteristics tables in
NO
Doc ID 023994 Rev 2
Start condition
Device select
addressing the
with RW = 0
Operation is
in progress
Write cycle
returned
memory
ACK
Next
7, is:
YES
Write cperation
Write operation
Continue the
Data for the
YES
NO
and Receive ACK
StartCondition
Send Address
M24C04-W M24C04-R M24C04-F
Random Read operation
Section 8: DC and AC
Device select
Continue the
with RW = 1
YES
AI01847d
AI01847e