MAX532BCWE-T Maxim Integrated, MAX532BCWE-T Datasheet - Page 9

• Manufacturer Part Number: MAX532BCWE-T
• Description: Digital to Analog Converters - DAC
• Manufacturer: Maxim Integrated

Specifications of MAX532BCWE-T

• Number Of Converters: 2
• Number Of Dac Outputs: 2
• Resolution: 12 bit
• Interface Type: Serial (SPI)
• Settling Time: 2.5 us
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC-16
• Maximum Power Dissipation: 842 mW
• Minimum Operating Temperature: 0 C
• Output Type: Voltage Buffered
• Supply Current: 5 mA
• Supply Voltage - Max: 16.5 V
• Supply Voltage - Min: 11.4 V
• Voltage Reference: External

Figure 4. Connections for Microwire
The MAX532 is Microwire and SPI compatible (Figures
4 and 5). Both DACs are programmed by writing three
8-bit words (see Figures 2 and 3, and the Functional
Diagram ). Serial data is clocked into the data registers
MSB first, with DACB information preceding DACA
information. Data is clocked in on the rising edge of
SCLK while CS is low. With CS high, data can not be
clocked into DIN, and DOUT is high impedance. SCLK
can be driven at rates up to 6.25MHz.
The MAX532 uses either a 3-wire or a 4-wire serial
interface. Three wires may be used (CS, DIN, SCLK)
by tying LDAC low. With LDAC low, the DACs are
updated simultaneously when CS goes high (see
Figure 2 and the Functional Diagram ). The 3-wire inter-
face may be used if the MAX532 is used alone, or if two
or more MAX532s are cascaded (DOUT of one device
tied to DIN of the other) (Figure 6).
The 4-wire interface (LDAC, CS, DIN, SCLK) is required
if several serial devices are tied to the same data line,
and it is desirable to update them simultaneously
(Figure 7). With the 4-wire interface, the DACs are
updated when LDAC goes low (see Figure 3 and the
Functional Diagram ).
A serial output, DOUT, allows cascading of two or more
MAX532s and allows read-back of the data written to
_______________Detailed Description
THE DOUT-SI CONNECTION IS NOT REQUIRED FOR WRITING TO THE
MAX532, BUT MAY BE USED FOR READ-BACK PURPOSES.
MAX532
DOUT
SCLK
LDAC
_______________________________________________________________________________________
DIN
CS
5V
1k
Digital Interface
SK
SO
SI
I/O
I/O
MICROWIRE
PORT
Voltage-Output, 12-Bit MDAC
the device’s 24-bit shift register. The data at DOUT is
delayed 24 clock cycles from the data at DIN (see
Figures 2 and 3, and the Functional Diagram ). DOUT
is an open-drain N-channel MOSFET that requires an
external pull-up resistor (typically 1kΩ if pulled up to
+5V, and 3kΩ if pulled up to +12V or +15V). Logic lev-
els are guaranteed with sink currents up to 5mA (see
Electrical Characteristics ). Output data changes on the
falling edge of SCLK when CS is low. If CS is high,
DOUT is three-state (high-impedance).
Any number of MAX532s can be daisy-chained by con-
necting the DOUT pin of one device (with a pull-up
resistor) to the DIN pin of the following device in the
chain (Figure 6).
When daisy-chaining devices, t
high), must be the greater of t
- t
tem and the term (t
spent charging the DOUT capacitance with the external
pull-up resistor. So, for t
+ t
where V
is connected to, R
and C is the capacitance at DOUT. Values of t
given in Table 1.
Figure 5. Connections for SPI
CS
DS
THE DOUT-MISO CONNECTION IS NOT REQUIRED FOR WRITING TO THE MAX532,
BUT MAY BE USED FOR READ-BACK PURPOSES.
t
RC
), where t
. Calculate t
= R
PULL-UP
MAX532
P
Dual, Serial-Input,
x C x ln (V
CSW
is the voltage that the pull-up resistor
RC
DOUT
LDAC
SCLK
is the CS pulse width used in the sys-
RC
P
DIN
CS
using the following equation:
is the value of the pull-up resistor,
+ t
PULL-UP
RC
TR
Daisy-Chaining Devices
- t
5V
< 250ns, t
DV
CSW
1k
/(V
+ t
CSS0
CPOL = 0, CPHA = 0
) accounts for the time
PULL-UP
MISO
MOSI
SCK
I/O
I/O
DS
CSS0
or t
(CS low to SCLK
DS
- 2.4V))
PORT
SPI
is simply t
SS
+ (t
RC
RC
+ t
are
DV
TR
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