MAX5705AAUB+ Maxim Integrated, MAX5705AAUB+ Datasheet - Page 17

• Manufacturer Part Number: MAX5705AAUB+
• Description: Digital to Analog Converters - DAC 12Bit 1Ch V Buffered Precision DAC
• Manufacturer: Maxim Integrated

Specifications of MAX5705AAUB+

• Rohs: yes
• Number Of Converters: 1
• Number Of Dac Outputs: 1
• Resolution: 12 bit
• Interface Type: Serial SPI
• Settling Time: 6 us
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: uMAX-10
• Maximum Power Dissipation: 707.3 mW
• Minimum Operating Temperature: - 40 C
• Output Type: Voltage Buffered
• Supply Current: 155 uA
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 2.7 V

The CODE command (B[23:20] = 1000) updates the
CODE register content for the DAC. Changes to the
CODE register content based on this command will not
affect the DAC output directly unless the LDAC input
is in a low state. Otherwise, a subsequent hardware
or software LOAD operation will be required to move
this content to the active DAC latch. This command is
gated when CLR is asserted, updates to this register are
ignored while the register is being cleared. See
1
The LOAD command (B[23:20] = 1001) updates the DAC
latch register content by uploading the current contents
of the CODE register. This command is gated when CLR
is asserted, updates to this register are ignored while the
register is being cleared. See
The CODE_LOAD command (B[23:20] = 1010 and 1011)
updates the CODE register contents as well as the DAC
register content of the DAC. This command is gated
when CLR is asserted, updates to these registers are
ignored while the register is being cleared. See
and
Table 1. DAC Data Bit Positions
Maxim Integrated
Ultra-Small, Single-Channel, 8-/10-/12-Bit Buffered Output
Voltage DACs with Internal Reference and SPI Interface
and
MAX5703
MAX5704
MAX5705
PART
Table
Table
2.
2.
B15
D11
D7
D9
B14
D10
D6
D8
CODE_LOAD Command
B13
D5
D7
D9
Table
B12
D4
D6
D8
CODE Command
LOAD Command
2.
B11
D3
D5
D7
B10
D2
D4
D6
Table 1
MAX5703/MAX5704/MAX5705
Table
B9
D1
D3
D5
B8
D0
D2
D4
Figure 2. Typical SPI Application Circuit
*ADDITIONAL SPI DEVICE
B7
D1
D3
X
µC
B6
D0
D2
X
CSB1
SCLK
MOSI
CSB2
MISO
CSB3
B5
D1
X
X
B4
D0
X
X
B3
X
X
X
CS
SCLK
DIN
CS
SCLK
DIN
DOUT
CS
SCLK
DIN
B2
X
X
X
MAX5703
MAX5704
MAX5705
B1
X
X
X
*
*
B0
X
X
X
17