STM32F372VCH6 STMicroelectronics, STM32F372VCH6 Datasheet - Page 25

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STM32F372VCH6

Manufacturer Part Number
STM32F372VCH6
Description
ARM Microcontrollers - MCU 32-Bit ARM Cortex M4 72MHz 256kB MCU FPU
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32F372VCH6

Product Category
ARM Microcontrollers - MCU
Rohs
yes
Core
ARM Cortex M4
Data Bus Width
32 bit

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STM32F37x
3.20
3.21
Universal synchronous/asynchronous receiver transmitter
(USART)
The STM32F37x embeds three universal synchronous/asynchronous receiver transmitters
(USART1, USART2 and USART3).
All USARTs interfaces are able to communicate at speeds of up to 9 Mbit/s.
They provide hardware management of the CTS and RTS signals, they support IrDA SIR
ENDEC, the multiprocessor communication mode, the single-wire half-duplex
communication mode, Smart Card mode (ISO 7816 compliant), autobaudrate feature and
have LIN Master/Slave capability. The USART interfaces can be served by the DMA
controller.
Refer to
Table 8.
1. X = supported.
Serial peripheral interface (SPI)/Inter-integrated sound
interfaces (I
Up to three SPIs are able to communicate at up to 18 Mbits/s in slave and master modes in
full-duplex and half-duplex communication modes. The 3-bit prescaler gives 8 master mode
frequencies and the frame is configurable to 8 bits or 16 bits. The hardware CRC
generation/verification supports basic SD Card/MMC modes.
The SPIs can be served by the DMA controller.
Three standard I
be operated in master or slave mode. These interfaces can be configured to operate with
16/32 bit resolution, as input or output channels. Audio sampling frequencies from 8 kHz up
to 192 kHz are supported. When either or both of the I
Hardware flow control for modem
Continuous communication using DMA
Multiprocessor communication
Synchronous mode
Smartcard mode
Single-wire half-duplex communication
IrDA SIR ENDEC block
LIN mode
Dual clock domain and wakeup from Stop mode
Receiver timeout interrupt
Modbus communication
Auto baud rate detection
Driver Enable
Table 8
STM32F37x USART implementation
USART modes/features
for the features of USART1, USART2 and USART3.
2
S interfaces (multiplexed with SPI1, SPI2 and SPI3) are available, that can
2
S)
Doc ID 022691 Rev 3
(1)
2
S interfaces is/are configured in
USART1
X
X
X
X
X
X
X
X
X
X
X
X
X
USART2
Functional overview
X
X
X
X
X
X
X
X
X
X
X
X
X
USART3
X
X
X
X
X
X
X
X
X
X
X
X
X
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