STM32L152C6U6 STMicroelectronics, STM32L152C6U6 Datasheet - Page 21

• Manufacturer Part Number: STM32L152C6U6
• Description: ARM Microcontrollers - MCU 32-Bit ARM Cortex 32kb LP LCD MCU
• Manufacturer: STMicroelectronics

Specifications of STM32L152C6U6

• Product Category: ARM Microcontrollers - MCU
• Rohs: yes
• Core: ARM Cortex M3
• Data Bus Width: 32 bit

STM32L151x6/8/B, STM32L152x6/8/B
Figure 2.
2. For the USB function to be available, both HSE and PLL must be enabled, with the CPU running at either
OSC32_OUT
OSC32_IN
OSC_OUT
24 MHz or 32 MHz.
OSC_IN
MCO
Clock tree
32.768 kHz
1-24 MHz
LSE OSC
HSE OSC
/1,2,4,
LSI RC
37 kHz
16 MHz
HSI RC
8,16
MSI RC
/2,4,
8,16
MCOSEL
LSE
PLLSRC
HSI
MSI
LSI
RTCSEL[1:0]
Doc ID 17659 Rev 8
x12,x16,x24
x3,x4,x6,x8
SYSCLK
HSI
MSI
HSE
PLLCLK
LSI
LSE
PLLMUL
x32,x48
RTCCLK
to Independent Watchdog (IWDG)
Peripheral clock
enable
Prescaler
/1, 2..512
AHB
PLLVCO/2
to RTC
to LCD
to
Timer 9, 10, 11 ETR
/2,/3,/4
PLLDIV
IWDGCLK
/1, 2, 4, 8, 16
If (APB1 prescaler =1) x1
/1, 2, 4, 8, 16
If (APB2 prescaler =1) x1
/8
Prescaler
Prescaler
32 MHz max
48 MHz
USBCLK
to USB interface
ADCCLK
APB1
APB2
Clock
Enable
to ADC
HSE = High-speed external clock signal
HSI = High-speed internal clock signal
LSI = Low-speed internal clock signal
LSE = Low -speed external clock signal
MS I = Multispeed internal clock signal
Legend :
else x2
32 MHz max
else x2
32 MHz max
PLLCLK
Peripheral Clock
Enable
Peripheral Clock
Enable
HSI
HSE
Peripheral Clock
Enable
HCLK
to AHB bus, core,
memory and DMA
FCLK Cortex
free running clock
to Cortex System timer
Peripheral Clock
Enable
Functional overview
CSS
SW
TIMxCLK
SYSCLK
TIMxCLK
peripherals to APB2
to TIM2,3,4,6 and 7
PCLK1
PCLK2
to TIM9, 10, and 11
to APB1
peripherals
ai17212c
32
MHz max
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