MK10DX64VFT5 Freescale Semiconductor, MK10DX64VFT5 Datasheet

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MK10DX64VFT5

Manufacturer Part Number
MK10DX64VFT5
Description
ARM Microcontrollers - MCU Kinetis 64K Flex
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK10DX64VFT5

Rohs
yes
Core
ARM Cortex M4
Processor Series
K10P32M50SF0
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
64 KB
Data Ram Size
16 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
QFN-48
Mounting Style
SMD/SMT
Freescale Semiconductor
Data Sheet: Technical Data
K10 Sub-Family
Supports the following:
MK10DN32VFM5, MK10DX32VFM5,
MK10DN64VFM5, MK10DX64VFM5,
MK10DN128VFM5, MK10DX128VFM5
Features
• Operating Characteristics
• Performance
• Memories and memory interfaces
• Clocks
• System peripherals
Freescale reserves the right to change the detail specifications as may be
required to permit improvements in the design of its products.
© 2011–2012 Freescale Semiconductor, Inc.
– Voltage range: 1.71 to 3.6 V
– Flash write voltage range: 1.71 to 3.6 V
– Temperature range (ambient): -40 to 105°C
– Up to 50 MHz ARM Cortex-M4 core with DSP
– Up to 128 KB program flash.
– Up to 32 KB FlexNVM on FlexMemory devices
– 2 KB FlexRAM on FlexMemory devices
– Up to 16 KB RAM
– Serial programming interface (EzPort)
– 3 to 32 MHz crystal oscillator
– 32 kHz crystal oscillator
– Multi-purpose clock generator
– Multiple low-power modes to provide power
– 4-channel DMA controller, supporting up to 41
– External watchdog monitor
– Software watchdog
– Low-leakage wakeup unit
instructions delivering 1.25 Dhrystone MIPS per
MHz
optimization based on application requirements
request sources
• Security and integrity modules
• Analog modules
• Timers
• Communication interfaces
– Hardware CRC module to support fast cyclic
– 128-bit unique identification (ID) number per chip
– 16-bit SAR ADC
– Two analog comparators (CMP) containing a 6-bit
– Programmable delay block
– Eight-channel motor control/general purpose/PWM
– Two-channel quadrature decoder/general purpose
– Periodic interrupt timers
– 16-bit low-power timer
– Carrier modulator transmitter
– Real-time clock
– SPI module
– I2C module
– Three UART modules
– I2S module
redundancy checks
DAC and programmable reference input
timer
timer
K10P32M50SF0
Document Number: K10P32M50SF0
Rev. 4 5/2012

Related parts for MK10DX64VFT5

MK10DX64VFT5 Summary of contents

Page 1

... External watchdog monitor – Software watchdog – Low-leakage wakeup unit Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. © 2011–2012 Freescale Semiconductor, Inc. Document Number: K10P32M50SF0 Rev. 4 5/2012 K10P32M50SF0 • Security and integrity modules – ...

Page 2

... DSPI switching specifications (full voltage range).45 6.8.3 I2C switching specifications..................................47 6.8.4 UART switching specifications..............................47 6.8.5 I2S/SAI Switching Specifications..........................47 6.9 Human-machine interfaces (HMI)......................................51 6.9.1 TSI electrical specifications...................................51 7 Dimensions...............................................................................53 7.1 Obtaining package dimensions.........................................53 8 Pinout........................................................................................53 8.1 K10 Signal Multiplexing and Pin Assignments..................53 8.2 K10 Pinouts.......................................................................54 9 Revision History........................................................................55 Freescale Semiconductor, Inc. ...

Page 3

... Qualification status K## Kinetis family A Key attribute M Flash memory type K10 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. http://www.freescale.com Description • Fully qualified, general market flow • Prequalification • K10 • Cortex-M4 w/ DSP • Cortex-M4 w/ DSP and FPU • Program flash only • ...

Page 4

... LQ = 144 LQFP ( mm) • 144 MAPBGA ( mm) • 256 MAPBGA ( mm) • MHz • MHz • 100 MHz • 120 MHz • 150 MHz • Tape and reel • (Blank) = Trays Values Freescale Semiconductor, Inc. ...

Page 5

... Description I Digital I/O weak pullup/ WP pulldown current 3.3 Definition: Attribute An attribute is a specified value or range of values for a technical characteristic that are guaranteed, regardless of whether you meet the operating requirements. K10 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Min. Max. 0.9 1.1 Min. Max. 10 130 ...

Page 6

... Result of exceeding a rating Measured characteristic K10 Sub-Family Data Sheet, Rev. 4 5/2012. 6 Min. — 7 Min. –0.3 1.2 The likelihood of permanent chip failure increases rapidly as soon as a characteristic begins to exceed one of its operating ratings. Operating rating Max. Unit pF Max. Unit V Freescale Semiconductor, Inc. ...

Page 7

... Typical values are provided as design guidelines and are neither tested nor guaranteed. K10 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Normal operating range Degraded operating range - No permanent failure - No permanent failure ...

Page 8

... Typical values assume you meet the following conditions (or other conditions as specified): Symbol T Ambient temperature A V 3.3 V supply voltage DD K10 Sub-Family Data Sheet, Rev. 4 5/2012. 8 Min. Typ 1.00 1.05 1.10 V (V) DD Description Value 25 3.3 Max. Unit 130 µ 150 °C 105 °C 25 °C –40 °C Unit °C V Freescale Semiconductor, Inc. ...

Page 9

... Determined according to JEDEC Standard JESD22-C101, Field-Induced Charged-Device Model Test Method for Electrostatic-Discharge-Withstand Thresholds of Microelectronic Components. 4.4 Voltage and current operating ratings Symbol Description V Digital supply voltage DD K10 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Min. –55 — Min. — Min. -2000 -500 -100 Table continues on the next page ...

Page 10

... Nonswitching electrical specifications K10 Sub-Family Data Sheet, Rev. 4 5/2012. 10 Min. Max. Unit — 155 mA –0 0 –0 0 – – –0.3 3.8 V Freescale Semiconductor, Inc. ...

Page 11

... Select the larger of these two calculated resistances. IN AIO_MAX IC 5.2.2 LVD and POR operating requirements Table Symbol Description V Falling VDD POR detect voltage POR K10 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Min. 1.71 1.71 –0.1 –0.1 1.71 0.7 × V 0.75 × V — — 0.06 × — ...

Page 12

... Falling VBAT supply POR detect voltage POR_VBAT K10 Sub-Family Data Sheet, Rev. 4 5/2012. 12 Min. Typ. Max. Unit 2.48 2.56 2.64 2.62 2.70 2.78 2.72 2.80 2.88 2.82 2.90 2.98 2.92 3.00 3.08 — ±80 — mV 1.54 1.60 1.66 1.74 1.80 1.86 1.84 1.90 1.96 1.94 2.00 2.06 2.04 2.10 2.16 — ±60 — mV 0.97 1.00 1.03 900 1000 1100 Min. Typ. Max. Unit 0.8 1.1 1.5 Freescale Semiconductor, Inc. Notes μs Notes V ...

Page 13

... Power mode transition operating behaviors All specifications except t POR assume this clock configuration: • CPU and system clocks = 50 MHz • Bus clock = 50 MHz • Flash clock = 25 MHz K10 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Min – 0 – ...

Page 14

... Table continues on the next page... Max. Unit Notes 300 μs 1 130 μs 130 μs 70 μs 70 μs 6 μs 5.2 μs 5.2 μs Max. Unit Notes See note 15 18.2 mA 17.7 mA 18 Freescale Semiconductor, Inc. ...

Page 15

... I Very low-leakage stop mode 0 current at 3.0 V DD_VLLS0 with POR detect circuit enabled • @ –40 to 25°C • @ 70°C • @ 105°C K10 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Min. Typ. — 867 — 1.1 — 509 — ...

Page 16

... For the ALLOFF curve, all peripheral clocks are disabled except FTFL K10 Sub-Family Data Sheet, Rev. 4 5/2012. 16 Min. Typ. Max. Unit — 0.176 0.859 μA — 2.2 13.1 μA — 13 23.9 μA — 0.19 0.22 μA — 0.49 0.64 μA — 2.2 3.2 μA — 0.57 0.67 μA — 0.90 1.2 μA — 2.4 3.5 μA — 0.67 0.94 μA — 1.0 1.4 μA — 2.7 3.9 μA Freescale Semiconductor, Inc. Notes 9 ...

Page 17

... Figure 2. Run mode supply current vs. core frequency K10 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. General 17 ...

Page 18

... TEM Cell Method. Measurements were made while the microcontroller was running basic application code. The reported K10 Sub-Family Data Sheet, Rev. 4 5/2012. 18 Frequency Typ. Unit band (MHz) 0.15–50 19 dBμV 50–150 21 dBμV 150–500 19 dBμV 500–1000 11 dBμV 0.15–1000 L — Freescale Semiconductor, Inc. Notes ...

Page 19

... System and core clock SYS f Bus clock BUS f Flash clock FLASH f External reference clock ERCLK K10 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc MHz 48MHz SYS BUS Table 8. Capacitance attributes Min. Normal run mode — — — — 1 VLPR mode — ...

Page 20

... Table continues on the next page... Max. Unit Notes 25 MHz 16 MHz 12.5 MHz 4 MHz Max. Unit Notes — Bus clock 1, 2 cycles — — — — Bus clock cycles Freescale Semiconductor, Inc. ...

Page 21

... Die junction temperature J T Ambient temperature A 5.4.2 Thermal attributes Board type Symbol Single-layer (1s) R θJA Four-layer (2s2p) R θJA K10 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Min. — — — — Description 32 QFN Thermal 94 resistance, junction to ambient (natural convection) Thermal 32 resistance, junction ...

Page 22

... Thermal 12 resistance, junction to board Thermal 1.5 resistance, junction to case Thermal 6 characterization parameter, junction to package top outside center (natural convection) Table continues on the next page... Unit Notes °C/W 1,3 °C/W , °C/W 5 °C/W 6 °C/W 7 Min. Max. Unit 2.7 5.5 V Freescale Semiconductor, Inc. ...

Page 23

... TCLK low to TDO data valid J11 Output data hold/invalid time after clock edge 1. They are common for JTAG and CJTAG. Input transition = 1 ns and Output load = 50pf TCLK (input) K10 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Figure 4 ...

Page 24

... TDO TDO K10 Sub-Family Data Sheet, Rev. 4 5/2012 J11 J12 J11 Figure 6. Test Access Port timing J5 J6 Input data valid Output data valid Output data valid J9 J10 Input data valid Output data valid Output data valid Freescale Semiconductor, Inc. ...

Page 25

... Loss of external clock minimum frequency — loc_low RANGE = 00 f Loss of external clock minimum frequency — loc_high RANGE = 01, 10 K10 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors J14 Figure 7. TRST timing Table 13. MCG specifications Min. Typ. — ...

Page 26

... MHz 2, 50 MHz 75 MHz 100 MHz — MHz 4, — MHz — MHz — MHz ps 180 — 150 — — — 100 MHz — µA 600 — µA — 4.0 MHz 120 — — ps Freescale Semiconductor, Inc ...

Page 27

... Supply current — low-power mode (HGO=0) DDOSC • 32 kHz • 4 MHz • 8 MHz (RANGE=01) • 16 MHz • 24 MHz • 32 MHz K10 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. — 1350 — 600 ± 1.49 — ...

Page 28

... MΩ — MΩ — — MΩ 1 — MΩ — — kΩ 200 — kΩ — — kΩ 0 — kΩ 0.6 — — 0.6 — — Freescale Semiconductor, Inc ...

Page 29

... This section describes the module electrical characteristics. 6.3.3.1 32 kHz oscillator DC electrical specifications Table 16. 32kHz oscillator DC electrical specifications Symbol Description V Supply voltage BAT R Internal feedback resistor F K10 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. 32 — 3 — 8 — — — ...

Page 30

... Min. — — — — Typ. Max 0.6 — Typ. Max. Unit Notes 32.768 — kHz 1000 — ms 32.768 — kHz V — mV BAT Typ. Max. Unit Notes 7.5 18 μs 13 113 ms 52 452 ms 52 452 ms Freescale Semiconductor, Inc. Unit ...

Page 31

... Byte-write to FlexRAM execution time: t • EEPROM backup eewr8b8k • EEPROM backup t eewr8b16k • EEPROM backup t eewr8b32k K10 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. — — — — — — — — ...

Page 32

... Typ. Max. Unit 2.5 6.0 mA 1.5 4.0 mA Max. Unit Notes 1 Typ. 50 — years 100 — years 50 K — cycles 50 — years Freescale Semiconductor, Inc. 2 ...

Page 33

... EEPROM – 2 × EEESIZE Writes_FlexRAM = EEESIZE where • Writes_FlexRAM — minimum number of writes to each FlexRAM location K10 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1 Typ. 20 100 ...

Page 34

... Figure 8. EEPROM backup writes to FlexRAM 6.4.2 EzPort Switching Specifications Table 22. EzPort switching specifications Num Description Operating voltage K10 Sub-Family Data Sheet, Rev. 4 5/2012. 34 Table continues on the next page... Min. Max. Unit 1.71 3.6 V Freescale Semiconductor, Inc. ...

Page 35

... EZP_CS EZP_Q (output) EZP_D (input) 6.5 Security and integrity modules There are no specifications necessary for the device's security and integrity modules. 6.6 Analog K10 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors EP3 EP2 EP4 EP9 EP8 EP7 ...

Page 36

... Table continues on the next page... are achievable on the Max. Unit Notes 3.6 V +100 mV 2 +100 DDA V V SSA V V REFH kΩ kΩ 4 18.0 MHz 4 12.0 MHz 5 818.330 Ksps Freescale Semiconductor, Inc. ...

Page 37

... ADC electrical characteristics Table 24. 16-bit ADC characteristics (V Symbol Description Conditions I Supply current DDA_ADC K10 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1 Typ. 37.037 — = 1.0 MHz unless otherwise stated. Typical values are for ADCK ...

Page 38

... SSA 2 Max. Unit Notes 3 MHz ADACK f ADACK 7.3 MHz 6.1 MHz 9.5 MHz ±6 LSB ±2.1 -1 LSB +1.9 -0.3 to 0.5 -2 LSB +1.9 -0.7 to +0.5 -5 LSB ADIN V DDA -1.8 5 — 4 LSB ±0.5 6 — bits — bits — bits — bits dB 7 — dB — dB Freescale Semiconductor, Inc. ...

Page 39

... ADC conversion clock <16MHz, Max hardware averaging (AVGE = %1, AVGS = %11) 6. Input data is 100 Hz sine wave. ADC conversion clock <12MHz. 7. Input data is 1 kHz sine wave. ADC conversion clock <12MHz. K10 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors = ...

Page 40

... Peripheral operating requirements and behaviors Figure 11. Typical ENOB vs. ADC_CLK for 16-bit differential mode Figure 12. Typical ENOB vs. ADC_CLK for 16-bit single-ended mode K10 Sub-Family Data Sheet, Rev. 4 5/2012. 40 Freescale Semiconductor, Inc. ...

Page 41

... Comparator initialization delay is defined as the time between software writes to change control inputs (Writes to DACEN, VRSEL, PSEL, MSEL, VOSEL) and the comparator output settling to a stable level LSB = V /64 reference K10 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1.71 — — ...

Page 42

... Peripheral operating requirements and behaviors 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0 0.1 0.4 0.7 Figure 13. Typical hysteresis vs. Vin level (VDD=3.3V, PMODE=0) K10 Sub-Family Data Sheet, Rev. 4 5/2012 1.3 1.6 1.9 2.2 Vin level (V) HYSTCTR S etting 2.5 2.8 3.1 Freescale Semiconductor, Inc. ...

Page 43

... Figure 14. Typical hysteresis vs. Vin level (VDD=3.3V, PMODE=1) 6.7 Timers See General switching specifications. 6.8 Communication interfaces K10 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 1 1.3 1.6 1.9 2.2 Vin level (V) HYSTCTR Setting 2.5 2.8 3.1 43 ...

Page 44

... Last data First data DS5 DS6 First data Data Last data Description Table continues on the next page... Max. Unit Notes 3 MHz — / SCK — — — ns — ns — ns DS4 Min. Max. Unit 2.7 3.6 V 12.5 MHz Freescale Semiconductor, Inc. ...

Page 45

... Table 28. Master mode DSPI timing (full voltage range) Num Description Operating voltage Frequency of operation DS1 DSPI_SCK output cycle time DS2 DSPI_SCK output high/low time K10 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Description DS10 DS15 DS12 First data Data DS14 First data Data Min ...

Page 46

... Data Last data Description Max. Unit Notes — — 8.5 ns — ns — ns — ns DS4 Min. Max. Unit 1.71 3.6 V — 6.25 MHz — ns BUS (t / SCK SCK/2) — — ns 3.2 — — ns — — Freescale Semiconductor, Inc. ...

Page 47

... RCR4[FSP] is 0). If the polarity of the clock and/or the frame sync have been inverted, all the timing remains valid by inverting the bit clock signal (BCLK) and/or the frame sync (FS) signal shown in the following figures. K10 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors DS10 DS15 ...

Page 48

... Figure 19. I2S/SAI timing — master modes K10 Sub-Family Data Sheet, Rev. 4 5/2012. 48 Min. 1.71 40 45% 80 45% — 0 — S10 Max. Unit 3.6 V — ns 55% MCLK period — ns 55% BCLK period 15 ns — — ns — ns — S10 S8 Freescale Semiconductor, Inc. ...

Page 49

... VLPR, VLPW, and VLPS mode performance over the full operating voltage range This section provides the operating performance over the full operating voltage for the device in VLPR, VLPW, and VLPS modes. K10 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1.71 80 ...

Page 50

... S10 Min. 1.71 250 Table continues on the next page... Max. Unit 3.6 V — ns 55% MCLK period — ns 55% BCLK period 45 ns — — ns — ns — S10 S8 Max. Unit 3.6 V — ns Freescale Semiconductor, Inc. ...

Page 51

... I2S_RXD Figure 22. I2S/SAI timing — slave modes 6.9 Human-machine interfaces (HMI) 6.9.1 TSI electrical specifications Table 34. TSI electrical specifications Symbol Description V Operating voltage DDTSI C Target electrode capacitance range ELE Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 45 — — 1 S11 ...

Page 52

... I )/( NSCN) ref ext ref = 16 μA (REFCHRG = 7 1.0 pF ref ref = 32 μA (REFCHRG = 15 0.5 pF ref ref Unit Notes MHz 2, 3 MHz μ μ fF/count 8 fF/count 9 fF/count 10 fF/count 11 bits μs 12 μA μA 13 Freescale Semiconductor, Inc. ...

Page 53

... VBAT VBAT VBAT 12 PTA0 JTAG_TCLK/ TSI0_CH1 SWD_CLK/ EZP_CLK 13 PTA1 JTAG_TDI/ TSI0_CH2 EZP_DI K10 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. http://www.freescale.com Then use this document number 98ARE10566D ALT1 ALT2 ALT3 ALT4 PTE16 SPI0_PCS0 UART2_TX FTM_CLKIN0 PTE17 SPI0_SCK UART2_RX FTM_CLKIN1 ...

Page 54

... UART0_CTS_ FTM0_CH5 b/ UART0_COL_b PTD6/ SPI0_PCS3 UART0_RX FTM0_CH6 LLWU_P15 PTD7 CMT_IRO UART0_TX FTM0_CH7 ALT5 ALT6 ALT7 EzPort JTAG_TDO/ EZP_DO TRACE_SWO JTAG_TMS/ SWD_DIO NMI_b EZP_CS_b LPTMR0_ALT1 FTM1_QD_ PHA FTM1_QD_ PHB I2S0_TXD0 I2S0_TX_FS I2S0_TX_BCLK CMP1_OUT CMP0_OUT I2S0_MCLK EWM_IN EWM_OUT_b FTM0_FLT0 FTM0_FLT1 Freescale Semiconductor, Inc. ...

Page 55

... Updated "Thermal operating requirements" section. • Updated "MCG specifications" table. • Updated "VREF full-range operating behaviors" table. • Updated "I2S/SAI Switching Specifications" section. • Updated "TSI electrical specifications" table. K10 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc ...

Page 56

... Corrected the following DSPI switching specifications: tightened DS5, DS6, and DS7; relaxed DS11 and DS13. • Removed references to USB as non-applicable. • For the "TSI electrical specifications", changed and clarified the example calculations for the MaxSens specification. K10 Sub-Family Data Sheet, Rev. 4 5/2012. 56 Freescale Semiconductor, Inc. ...

Page 57

... Freescale Semiconductor makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any liability, including without limitation consequential or incidental damages. "Typical" parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time ...

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