MK20DN128VLF5 Freescale Semiconductor, MK20DN128VLF5 Datasheet - Page 50

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MK20DN128VLF5

Manufacturer Part Number
MK20DN128VLF5
Description
ARM Microcontrollers - MCU KINETIS 128K
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK20DN128VLF5

Rohs
yes
Core
ARM Cortex M4
Processor Series
K20
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
128 KB
Data Ram Size
2 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MK20DN128VLF5
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Peripheral operating requirements and behaviors
6.8.8 I2S/SAI Switching Specifications
This section provides the AC timing for the I2S/SAI module in master mode (clocks are
driven) and slave mode (clocks are input). All timing is given for noninverted serial clock
polarity (TCR2[BCP] is 0, RCR2[BCP] is 0) and a noninverted frame sync (TCR4[FSP]
is 0, RCR4[FSP] is 0). If the polarity of the clock and/or the frame sync have been
inverted, all the timing remains valid by inverting the bit clock signal (BCLK) and/or the
frame sync (FS) signal shown in the following figures.
6.8.8.1 Normal Run, Wait and Stop mode performance over the full
This section provides the operating performance over the full operating voltage for the
device in Normal Run, Wait and Stop modes.
50
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
Num.
operating voltage range
Operating voltage
I2S_MCLK cycle time
I2S_MCLK pulse width high/low
I2S_TX_BCLK/I2S_RX_BCLK cycle time (output)
I2S_TX_BCLK/I2S_RX_BCLK pulse width high/low
I2S_TX_BCLK/I2S_RX_BCLK to I2S_TX_FS/
I2S_RX_FS output valid
I2S_TX_BCLK/I2S_RX_BCLK to I2S_TX_FS/
I2S_RX_FS output invalid
I2S_TX_BCLK to I2S_TXD valid
I2S_TX_BCLK to I2S_TXD invalid
I2S_RXD/I2S_RX_FS input setup before
I2S_RX_BCLK
I2S_RXD/I2S_RX_FS input hold after I2S_RX_BCLK
Characteristic
Table 36. I2S/SAI master mode timing
K20 Sub-Family Data Sheet, Rev. 4 5/2012.
1.71
40
45%
80
45%
0
0
25
0
Min.
3.6
55%
55%
15
15
Max.
Freescale Semiconductor, Inc.
V
ns
MCLK period
ns
BCLK period
ns
ns
ns
ns
ns
ns
Unit

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