MAX1158ACUP+ Maxim Integrated, MAX1158ACUP+ Datasheet - Page 8
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MAX1158ACUP+
Manufacturer Part Number
MAX1158ACUP+
Description
Analog to Digital Converters - ADC 14-Bit 135ksps 4.2V Precision ADC
Manufacturer
Maxim Integrated
Datasheet
1.MAX1174AEUP.pdf
(15 pages)
Specifications of MAX1158ACUP+
Rohs
yes
Number Of Channels
1
Architecture
SAR
Conversion Rate
135 KSPs
Resolution
14 bit
Input Type
Single-Ended
Snr
85 dB
Interface Type
Parallel
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 70 C
Package / Case
TSSOP-20
Maximum Power Dissipation
879 mW
Minimum Operating Temperature
0 C
Number Of Converters
1
Voltage Reference
Internal, External
Select standby mode or shutdown mode with the R/C
bit during the second falling edge of CS (see the
Selecting Standby or Shutdown Mode section). The
MAX1156/MAX1158/MAX1174 automatically enter
either standby mode (reference and buffer on) or shut-
down (reference and buffer off) after each conversion,
depending on the status of R/C during the second
falling edge of CS.
The MAX1156/MAX1158/MAX1174 generate an internal
conversion clock to free the microprocessor from the
burden of running the SAR conversion clock. Total con-
version time (t
falling edge of CS) to end of conversion (EOC) falling is
4.7µs (max).
CS and R/C control acquisition and conversion in the
MAX1156/MAX1158/MAX1174 (see Figure 2). The first
falling edge of CS powers up the device and puts it in
acquire mode if R/C is low. The convert start is ignored
if R/C is high. The MAX1156/MAX1158/MAX1174 need
at least 12ms (C
internal reference to wake up and settle before starting
the conversion, if powering up from shutdown.
14-Bit, 135ksps, Single-Supply ADCs with
Bipolar Analog Input Range
Figure 2. MAX1156/MAX1158/MAX1174 Timing Diagram
8
_______________________________________________________________________________________
D7/D15–D0/D8
CONV
Applications Information
HBEN
EOC
REFADJ
R/C
CS
) after entering hold mode (second
= 0.1µF, C
t
t
HIGH-Z
DH
CSL
Starting a Conversion
Power-Down Modes
t
ACQ
REF
t
CSH
Internal Clock
= 10µF) for the
t
DOWN CONTROL
DS
REF POWER-
t
CONV
Figure 3. Typical Application Circuit for the MAX1156/MAX1158/
MAX1174
t
ANALOG INPUT
LOW
BYTE
DV
HIGH
BYTE
t
t
DO
DO
0.1µF
BYTE VALID
HIGH/LOW
AIN
R/C
CS
HBEN
+5V ANALOG
t
DO1
AV
DD
MAX1156
MAX1158
MAX1174
BYTE VALID
HIGH/LOW
AGND DGND
+5V DIGITAL
DV
D8–D13
REFADJ
DD
D0–D7
t
t
EOC
BR
EOC
REF
OR
0.1µF
µP DATA
BUS
HIGH-Z
0.1µF
10µF