W7100A WIZnet, W7100A Datasheet - Page 76

• Manufacturer Part Number: W7100A
• Description: 8-bit Microcontrollers - MCU 8051 CORE+HARDWIRED TCP/IP+MAC+PHY
• Manufacturer: WIZnet

Specifications of W7100A

• Rohs: yes
• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 255 B
• Data Ram Size: 64 KB
• On-chip Adc: No
• Operating Supply Voltage: 3 V to 3.6 V
• Operating Temperature Range: - 40 C to + 80 C
• Package / Case: LQFP-100
• Mounting Style: SMD/SMT
• Interface Type: UART
• Program Memory Type: Flash

© Copyright 2011 WIZnet Co., Inc. All rights reserved.
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~
S2_RXMEM_SIZE
S2_TXMEM_SIZE
S2_RX_RSR0
S2_RX_RSR1
S2_TX_FSR0
S2_TX_FSR1
S2_TX_WR0
S2_TX_WR1
S2_DPORT0
S2_DPORT1
S2_PROTO0
S2_PROTO1
S2_TX_RD0
S2_TX_RD1
S2_PORT0
S2_PORT1
S2_DHAR0
S2_DHAR1
S2_DHAR2
S2_DHAR3
S2_DHAR4
S2_DHAR5
S2_MSSR0
S2_MSSR1
S2_DIPR0
S2_DIPR1
S2_DIPR2
S2_DIPR3
S2_TOS
S2_TTL
S2_SR
SOCKET 2 SOCKET Status Register
SOCKET 2 Receive Memory Size Register
SOCKET 2 Transmit Memory Size Register
S2_PORT (SOCKET 2 Source Port Register)
S2_DHAR (SOCKET 2 Destination Hardware Address Register)
S2_DIPR (SOCKET 2 Destination IP Address Register)
S2_DPORT (SOCKET 2 Destination Port Register)
S2_MSSR (SOCKET 2 Maximum Segment Size Register)
S2_PROTO (SOCKET 2 Protocol of IP Header Field Register in
IP raw mode)
SOCKET 2 IP Type of Service(TOS) Register
SOCKET 2 IP Time to Live(TTL) Register
Reserved
S2_TX_FSR (SOCKET 2 Transmit Free Memory Size Register)
S2_TX_RD
(SOCKET 2 Transmit Memory Read Pointer Register)
S2_TX_WR
(SOCKET 2 Transmit Memory Write Pointer Register)
S2_RX_RSR (SOCKET 2 Received Data Size Register)
Ver. 1.12
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