MAX1304ECM-T Maxim Integrated, MAX1304ECM-T Datasheet - Page 34

• Manufacturer Part Number: MAX1304ECM-T
• Description: Analog to Digital Converters - ADC
• Manufacturer: Maxim Integrated

Specifications of MAX1304ECM-T

• Number Of Channels: 8
• Architecture: SAR
• Conversion Rate: 1075 KSPs
• Resolution: 12 bit
• Input Type: Single-Ended
• Snr: 71 dB
• Interface Type: Parallel
• Operating Supply Voltage: 2.7 V to 5.25 V, 4.75 V to 5.25 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-48
• Maximum Power Dissipation: 1818.2 mW
• Minimum Operating Temperature: - 40 C
• Number Of Converters: 1
• Voltage Reference: 2.5 V

Aperture Jitter (t
aperture delay.
Jitter is a concern when considering an ADC’s dynamic
performance, e.g., SNR. To reconstruct an analog input
from the ADC digital outputs, it is critical to know the
time at which each sample was taken. Typical applica-
tions use an accurate sampling clock signal that has
low jitter from sampling edge to sampling edge. For a
system with a perfect sampling clock signal, with no
clock jitter, the SNR performance of an ADC is limited
by the ADC’s internal aperture jitter as follows:
where f
t
8-/4-/2-Channel, 12-Bit, Simultaneous-Sampling ADCs
with ±10V, ±5V, and 0 to +5V Analog Input Ranges
34
AJ
is the time of the aperture jitter.
______________________________________________________________________________________
IN
SNR
represents the analog input frequency and
=
AJ
20
) is the sample-to-sample variation in
x
log
⎛
⎜
⎝
2
x
π
x f
1
Aperture Jitter
IN
x t
AJ
⎞
⎟
⎠
A small -20dBFS analog input signal is applied to an
ADC so that the signal’s slew rate does not limit the
ADC’s performance. The input frequency is then swept
up to the point where the amplitude of the digitized
conversion result has decreased by -3dB.
A large, -0.5dBFS analog input signal is applied to an
ADC, and the input frequency is swept up to the point
where the amplitude of the digitized conversion result
has decreased by -3dB. This point is defined as full-
power input bandwidth frequency.
DC PSRR is defined as the change in the positive full-
scale transfer function point caused by a ±5% variation
in the analog power-supply voltage (AVDD).
DC Power-Supply Rejection (PSRR)
Small-Signal Bandwidth
Full-Power Bandwidth