SPC5646CCF0MLU1 Freescale Semiconductor, SPC5646CCF0MLU1 Datasheet - Page 6

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SPC5646CCF0MLU1

Manufacturer Part Number
SPC5646CCF0MLU1
Description
32-bit Microcontrollers - MCU 3M FLASH,25 6K RAM,CSE
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of SPC5646CCF0MLU1

Rohs
yes
Core
e200
Processor Series
MPC5646C
Data Bus Width
32 bit
Maximum Clock Frequency
120 MHz
Program Memory Size
3 MB
Data Ram Size
256 KB
On-chip Adc
Yes
Operating Supply Voltage
0.3 V to 6.2 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-176
Mounting Style
SMD/SMT
A/d Bit Size
10 bit, 12 bit
A/d Channels Available
33
Interface Type
CAN, I2C, SCI, SPI
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
147
Number Of Timers
32
Program Memory Type
Flash
Supply Voltage - Max
6.2 V
Supply Voltage - Min
0.3 V

Available stocks

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Block diagram
2
6
Figure 1
Legend:
Notes:
Request
Interrupt
NMI0
NMI1
JTAG Port
Nexus Port
Clocks
Semaphores
16 x
Block diagram
ADC
BAM
CSE
CAN
CMU
CTU
DMAMUX DMA Channel Multiplexer
DSPI
eDMA
FlexCAN
FEC
eMIOS
ECSM
FMPLL
FlexRay
I2C
IMUX
INTC
1) 10 dedicated channels plus up to 19 shared channels. See the device-comparison table.
2) Package dependent. 27 or 33 dedicated channels plus up to 19 shared channels. See the device-comparison table.
3)
Reset Control
shows the detailed block diagram of the MPC5646C.
regulator
Pad Control
16 x precision channels (ANP) are mapped on input only I/O cells.
Voltage
Interrupt
Request
External
GPIO &
IMUX
SIUL
FMPLL
Nexus
RTC/API
Analog-to-Digital Converter
Boot Assist Module
Cryptographic Services Engine
Controller Area Network (FlexCAN)
Clock Monitor Unit
Cross Triggering Unit
Deserial Serial Peripheral Interface
enhanced Direct Memory Access
Controller Area Network controller modules
Fast Ethenet Controller
Enhanced Modular Input Output System
Error Correction Status Module
Frequency-Modulated Phase-Locked Loop
FlexRay Communication Controller
Inter-integrated Circuit Bus
Internal Multiplexer
Interrupt Controller
I/O
4  STM
1  12-bit
ADC
10 ch
NMI1
NMI0
JTAGC
Interrupt requests
CMU
(1)
(3)
from peripheral
SWT
blocks
27 ch or 33 ch
MPC5646C Microcontroller DataSheet, Rev. 5.1
1  10-bit
ADC
Figure 1. MPC5646C block diagram
ECSM
(3)
Nexus 3+
Nexus 3+
e200z0h
e200z4d
(2)
PIT RTI
8
INTC
CTU
Peripheral Bridge
registers
MPU
MC_RGM
Instructions
Instructions
FlexRay
JTAGC
LINFlexD Local Interconnect Network Flexible with DMA support
MC_ME
MC_CGM Clock Generation Module
MC_PCU Power Control Unit
MC_RGM Reset Generation Module
MPU
Nexus
NMI
PIT_RTI
RTC/API
SIUL
SRAM
SSCM
STM
SWT
STCU
WKPU
(Master)
(Master)
(Master)
(Master)
FEC
CSE
Data
Data
2  32 ch
eMIOS
MC_CGM
JTAG controller
Mode Entry Module
Memory Protection Unit
Nexus Development Interface
Non-Maskable Interrupt
Periodic Interrupt Timer with Real-Time Interrupt
Real-Time Clock/ Autonomous Periodic Interrupt
System Integration Unit Lite
Static Random-Access Memory
System Status Configuration Module
System Timer Module
Software Watchdog Timer
Self Test Control Unit
Wakeup Unit
( Master )
eDMA
LINFlexD
MC_ME
10 
MC_PCU
2  128 KB
2  SRAM
controller
SRAM
DSPI
8 
(Slave)
(Slave)
Code Flash
2  1.5 MB
BAM
I
2
Sampler
C
Flash memory
CAN
controller
DMAMUX
SSCM
Data Flash
FlexCAN
(Slave)
64 KB
STCU
6 
WKPU
Freescale

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