MAX1062CCUB-T Maxim Integrated, MAX1062CCUB-T Datasheet - Page 14

• Manufacturer Part Number: MAX1062CCUB-T
• Description: Analog to Digital Converters - ADC
• Manufacturer: Maxim Integrated

Specifications of MAX1062CCUB-T

• Number Of Channels: 1
• Architecture: SAR
• Conversion Rate: 200 KSPs
• Resolution: 14 bit
• Input Type: Single-Ended
• Snr: 84 dB
• Interface Type: QSPI, Serial (SPI, Microwire)
• Operating Supply Voltage: 2.7 V to 5.25 V, 5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: uMAX
• Maximum Power Dissipation: 444 mW
• Minimum Operating Temperature: 0 C
• Number Of Converters: 1
• Voltage Reference: 4.096 V

neously. Three consecutive 8-bit readings (Figure 12b)
are necessary to obtain the entire 14-bit result from the
ADC. DOUT data transitions on the serial clock’s falling
edge and is clocked into the µC on SCLK’s rising edge.
The first 8-bit data stream contains all zeros. The sec-
ond 8-bit data stream contains the MSB through D6.
The third 8-bit data stream contains bits D5 through D0
followed by S1 and S0.
Integral nonlinearity (INL) is the deviation of the values
on an actual transfer function from a straight line. This
straight line can be either a best-fit straight line fit or a
14-Bit, +5V, 200ksps ADC with 10µA Shutdown
14
Table 2. Detailed SSPSTAT Register Contents
X = Don’t care
Figure 12b. SPI Interface Timing with PIC16/PIC17 in Master Mode (CKE = 1, CKP = 0, SMP = 0, SSPM3 - SSPM0 =0001)
SMP
CKE
R/W
D/A
UA
CONTROL BIT
BF
P
S
______________________________________________________________________________________
*WHEN CS IS HIGH, DOUT = HIGH-Z
DOUT*
SCLK
CS
BIT7
BIT6
BIT5
BIT4
BIT3
BIT2
BIT1
BIT0
SETTINGS
MAX1062
0
X
X
X
X
X
X
0
1
0
Integral Nonlinearity
0
SPI Data Input Sample Phase. Input data is sampled at the middle of the data output time.
SPI Clock Edge Select Bit. Data will be transmitted on the rising edge of the
serial clock.
Data Address Bit
Stop Bit
Start Bit
Read/Write Bit Information
Update Address
Buffer Full Status Bit
1ST BYTE READ
0
Definitions
0
SYNCHRONOUS SERIAL-PORT CONTROL REGISTER (SSPSTAT)
D5
0
D4
0
0
D3
3RD BYTE READ
D2
20
line drawn between the end points of the transfer func-
tion, once offset and gain errors have been nullified.
The static linearity parameters for the MAX1062 are
measured using the endpoint method.
Differential nonlinearity (DNL) is the difference between
an actual step width and the ideal value of 1LSB. A
DNL error specification of 1LSB guarantees no missing
codes and a monotonic transfer function.
Aperture jitter (t
the time between samples. Aperture delay (t
D1
LSB
D0
D13
MSB
S1
D12
AJ
S0
24
) is the sample-to-sample variation in
D11
HIGH-Z
D10
2ND BYTE READ
Differential Nonlinearity
12
D9
Aperture Definitions
D8
D7
D6
16
AD
D5
) is the