MAX1282ACEE Maxim Integrated, MAX1282ACEE Datasheet - Page 18

• Manufacturer Part Number: MAX1282ACEE
• Description: Analog to Digital Converters - ADC
• Manufacturer: Maxim Integrated

Specifications of MAX1282ACEE

• Number Of Channels: 4/2
• Architecture: SAR
• Conversion Rate: 400 KSPs
• Resolution: 12 bit
• Input Type: Single-Ended/Pseudo-Differential
• Interface Type: 4-Wire (SPI, Microwire, QSPI, TMS320)
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Power Dissipation: 535 mW
• Number Of Converters: 1
• Voltage Reference: 2.5 V

300ksps/400ksps, Single-Supply, 4-Channel,
Serial 12-Bit ADCs with Internal Reference
To use the direct REF input, disable the internal buffer by
connecting REFADJ to V
makes buffering the external reference unnecessary.
Table 5 shows the full-scale voltage ranges for unipolar
and bipolar modes.
Figure 13 depicts the nominal, unipolar input/output
(I/O) transfer function, and Figure 14 shows the bipolar
I/O transfer function. Code transitions occur halfway
between successive-integer LSB values. Output coding
is binary, with 1LSB = 0.61mV (2.500V / 4096) for unipo-
lar operation, and 1LSB = 0.61mV [(2.500V / 2) / 4096]
for bipolar operation.
For best performance, use PC boards; wire-wrap
boards are not recommended. Board layout should
ensure that digital and analog signal lines are separated
from each other. Do not run analog and digital (espe-
cially clock) lines parallel to one another, or digital lines
underneath the ADC package.
Figure 11a. Full Power-Down Timing
Figure 11b. FASTPD and REDP Timing
18
______________________________________________________________________________________
I
VDD1
RE FADJ
+ I
VDD2
IV
DIN
REF
Layout, Grounding, and Bypassing
DD1
+ IV
DIN
DD2
REF
1
FULLPD
1
DD1
2.5mA
1.22V
2.5V
0 0
REDP
2.5V (ALWAYS ON)
2.5mA
. Using the REFADJ input
Transfer Function
1 0
0mA
0V
0V
0.9mA
1
γ = RC = 17kΩ x 0.01µF
REDP
DUMMY CONVERSION
2.5mA
WAIT 2ms (10 x RC)
1
1 0
REDP
2.5mA
1.3mA OR 0.9mA
Figure 15 shows the recommended system ground
connections. Establish a single-point analog ground
(star ground point) at GND. Connect all other analog
grounds to the star ground. Connect the digital system
ground to this ground only at this point. For lowest-
noise operation, the ground return to the star ground’s
power supply should be low impedance and as short
as possible.
High-frequency noise in the V
affect the high-speed comparator in the ADC. Bypass
the supply to the star ground with 0.1µF and 10µF
capacitors close to V
Minimize capacitor lead lengths for best supply-noise
rejection. If the power supply is very noisy, a 10Ω resis-
tor can be connected as a lowpass filter (Figure 15).
The MAX1282/MAX1283 can interface with QSPI using
the circuit in Figure 16 (CPOL = 0, CPHA = 0). This
QSPI circuit can be programmed to do a conversion on
each of the four channels. The result is stored in memory
without taxing the CPU, since QSPI incorporates its own
microsequencer.
1 0
High-Speed Digital Interfacing with QSPI
0.9mA
1
FULLPD
1.22V
2.5mA
2.5V
1
0 0
FASTPD
DD1
2.5mA
0mA
of the MAX1282/MAX1283.
0 1
DD1
1.3mA
power supply may
1