MC9S12P32MFT Freescale Semiconductor, MC9S12P32MFT Datasheet - Page 46

• Manufacturer Part Number: MC9S12P32MFT
• Description: 16-bit Microcontrollers - MCU 16 BIT 32K FLASH
• Manufacturer: Freescale Semiconductor

Specifications of MC9S12P32MFT

• Rohs: yes
• Core: S12
• Processor Series: MC9S12P
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 32 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.13 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: QFN-48
• Mounting Style: SMD/SMT

1. 16 bits vector address based
Device Overview MC9S12P-Family
1.11.3
When a reset occurs, MCU registers and control bits are initialized. Refer to the respective block sections
for register reset states.
On each reset, the Flash module executes a reset sequence to load Flash configuration registers.
1.11.3.1
On each reset, the Flash module will hold CPU activity while loading Flash module registers from the
Flash memory. If double faults are detected in the reset phase, Flash module protection and security may
be active on leaving reset. This is explained in more detail in the Flash module section
1.11.3.2
If a reset occurs while any Flash command is in progress, that command will be immediately aborted. The
state of the word being programmed or the sector/block being erased is not guaranteed.
1.11.3.3
Refer to the PIM section for reset configurations of all peripheral module ports.
1.11.3.4
The RAM arrays are not initialized out of reset.
46
Vector Address
Vector base + $AE
Vector base + $8E
Vector base + $8A
Vector base + $90
Vector base + $88
Vector base + $86
Vector base + $84
Vector base + $82
Vector base + $80
Vector base+ $8C
to
Effects of Reset
Flash Configuration Reset Sequence Phase
Reset While Flash Command Active
I/O Pins
Memory
(1)
Autonomous periodical interrupt
PWM emergency shutdown
Low-voltage interrupt (LVI)
High temperature interrupt
ATD compare interrupt
Table 1-12. Interrupt Vector Locations (Sheet 3 of 3)
Spurious interrupt
Interrupt Source
Port P interrupt
(API)
S12P-Family Reference Manual, Rev. 1.13
Mask
CCR
I bit
I bit
I bit
I bit
I bit
I bit
—
Reserved
Reserved
PIEP (PIEP7,PIEP5-PIEP0)
CPMUAPICTRL (APIE)
ATDCTL2 (ACMPIE)
PWMSDN (PWMIE)
CPMUHTCL (HTIE)
CPMUCTRL (LVIE)
Local Enable
None
Freescale Semiconductor
from STOP
Wake up
13.6
Yes
Yes
Yes
No
No
No
-
Initialization.
from WAIT
Wakeup
Yes
Yes
Yes
Yes
Yes
Yes
-