MAX1177AEUP+T Maxim Integrated, MAX1177AEUP+T Datasheet - Page 6
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MAX1177AEUP+T
Manufacturer Part Number
MAX1177AEUP+T
Description
Analog to Digital Converters - ADC 16-Bit 135ksps 4.2V Precision ADC
Manufacturer
Maxim Integrated
Datasheet
1.MAX1177AEUP.pdf
(13 pages)
Specifications of MAX1177AEUP+T
Rohs
yes
Number Of Channels
1
Architecture
SAR
Conversion Rate
135 KSPs
Resolution
16 bit
Input Type
Single-Ended
Snr
91 dB
Interface Type
Parallel
Operating Supply Voltage
4.75 V to 5.25 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TSSOP-20
Maximum Power Dissipation
879 mW
Minimum Operating Temperature
- 40 C
Number Of Converters
1
Voltage Reference
4.096 V
16-Bit, 135ksps, Single-Supply ADC
with to 10V Input Range
6
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PIN
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
REFADJ
D4/D12
D5/D13
D6/D14
D7/D15
D2/D10
D3/D11
NAME
AGND
AGND
DGND
D0/D8
D1/D9
HBEN
DV
AV
EOC
REF
R/C
AIN
CS
DD
DD
Tri-State Digital-Data Output
Tri-State Digital-Data Output
Tri-State Digital-Data Output
Tri-State Digital-Data Output. D15 is the MSB.
Read/Convert Input. Power up and put the device in acquisition mode by holding R/C low during the
first falling edge of CS. During the second falling edge of CS, the level on R/C determines whether the
reference and reference buffer power down or remain on after conversion. Set R/C high during the
second falling edge of CS to power down the reference and buffer, or set R/C low to leave the
reference and buffer powered up. Set R/C high during the third falling edge of CS to put valid data on
the bus.
End of Conversion. EOC drives low when conversion is complete.
Analog Supply Input. Bypass with a 0.1µF capacitor to AGND.
Analog Ground. Primary analog ground (star ground).
Analog Input
Analog Ground. Connect pin 10 to pin 8.
Reference Buffer Output. Bypass REFADJ with a 0.1µF capacitor to AGND for internal reference
mode. Connect REFADJ to AV
Reference Input/Output. Bypass REF with a 10µF capacitor to AGND for internal reference mode.
External reference input when in external reference mode.
High-Byte Enable Input. Used to multiplex the 16-bit conversion result.
1: MSB available on the data bus.
0: LSB available on the data bus.
Convert Start. The first falling edge of CS powers up the device and enables acquire mode when R/C
is low. The second falling edge of CS starts the conversion. The third falling edge of CS loads the
result onto the bus when R/C is high.
Digital Ground
Digital Supply Voltage. Bypass with a 0.1µF capacitor to DGND.
Tri-State Digital-Data Output. D0 is the LSB.
Tri-State Digital-Data Output
Tri-State Digital-Data Output
Tri-State Digital-Data Output
DD
to select external reference mode.
FUNCTION
Pin Description