IS45S16400F-6TLA2-TR ISSI, IS45S16400F-6TLA2-TR Datasheet - Page 23

• Manufacturer Part Number: IS45S16400F-6TLA2-TR
• Description: DRAM 64M (4Mx16) 166MHz Automotive Temp
• Manufacturer: ISSI

Specifications of IS45S16400F-6TLA2-TR

• Product Category: DRAM
• Rohs: yes
• Data Bus Width: 16 bit
• Package / Case: TSOP-54
• Memory Size: 64 Mbit
• Maximum Clock Frequency: 166 MHz
• Access Time: 6 ns, 5.4 ns
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 3 V
• Maximum Operating Current: 140 mA
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 1500

IS42S16400F
IS45S16400F
diagram for each possible CAS latency; data element n +
3 is either the last of a burst of four or the last desired of
a longer burst. Following the PRECHARGE command, a
subsequent command to the same bank cannot be issued
until t
hidden during the access of the last data element(s).
In the case of a fixed-length burst being executed to
completion, a PRECHARGE command issued at the
optimum time (as described above) provides the same
operation that would result from the same fixed-length
burst with auto precharge. The disadvantage of the PRE-
CHARGE command is that it requires that the command
and address buses be available at the appropriate time to
issue the command; the advantage of the PRECHARGE
command is that it can be used to truncate fixed-length
or full-page bursts.
CAS Latency
Integrated Silicon Solution, Inc. — www.issi.com
Rev. I
12/01/2011
rp
is met. Note that part of the row precharge time is
COMMAND
COMMAND
CLK
CLK
DQ
DQ
READ
READ
T0
T0
CAS Latency - 2
NOP
NOP
CAS Latency - 3
T1
T1
t
LZ
t
AC
Full-page READ bursts can be truncated with the BURST
TERMINATE command, and fixed-length READ bursts
may be truncated with a BURST TERMINATE command,
provided that auto precharge was not activated. T he BURST
TERMINATE command should be issued x cycles before
the clock edge at which the last desired data element is
valid, where x equals the CAS latency minus one. This is
shown in the READ Burst Termination diagram for each
possible CAS latency; data element n + 3 is the last desired
data element of a longer burst.
NOP
NOP
T2
T2
D
OUT
t
t
OH
LZ
t
AC
NOP
T3
T3
D
DON'T CARE
UNDEFINED
OUT
t
OH
T4
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