ZADCS1282VIS20T ZMDI, ZADCS1282VIS20T Datasheet - Page 16
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ZADCS1282VIS20T
Manufacturer Part Number
ZADCS1282VIS20T
Description
Analog to Digital Converters - ADC ADC
Manufacturer
ZMDI
Datasheet
1.ZADCS1222IS14T.pdf
(26 pages)
Specifications of ZADCS1282VIS20T
Product Category
Analog to Digital Converters - ADC
Rohs
yes
Number Of Channels
8/4
Architecture
SAR
Conversion Rate
200 KSPs
Resolution
12 bit
Input Type
Single-Ended/Differential
Snr
70 dB
Interface Type
Microwire, QSPI, SPI
Operating Supply Voltage
2.7 V to 5.25 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SSOP-20
Maximum Power Dissipation
250 mW
Minimum Operating Temperature
- 25 C
Number Of Converters
1
Voltage Reference
2.5 V
2.2.
The analog input to the converter is fully differential. Both converter input signals IN
Block diagram at front page) get sampled during the acquisition period enabling the converter to be used in
fully differential applications where both signals can vary over time.
The ZADCS12x2 family converters do not require that the negative input signal be kept constant within
± 0.5LSB during the entire conversion as is commonly required by converters featuring pseudo differential
operation only.
The input signals can be applied single ended, referenced to the COM pin, or differential, using pairs of the
input channels. The desired configuration is selectable for every conversion via the Control-Byte received on
DIN pin of the digital interface (see further description below)
A block diagram of the input multiplexer is shown in Figure
Control-Byte bits A2, A1, A0 and SGL/DIF to the configuration of the analog multiplexer. The entire table
applies only to ZADCS1282 devices. For ZADCS1242 devices bit A1 is don’t care, for ZADCS1222 devices
A1 and A0 are don’t care.
Both input signals IN
depending on the selected conversion mode – uniploar or bipolar – certain input voltage relations can limit the
output code range of the converter.
In unipolar mode the voltage at IN
entire 8 bit transfer characteristic is then covered by IN
IN
voltage is clamped at VDD + 0.2V by ESD protection devices.
Figure 6: Input voltage range in unipolar mode
The voltage at IN
mentioned VDD condition is true. See also Figure 6 for input voltage ranges in unipolar conversion mode.
Data Sheet
October 12, 2011
1.5*V
0.5*V
+
ZADCS1282/1242/1222
12-Bit, 200ksps, ADC Family
>(IN
V
V
Analog Input
IN+
REF
REF
0V
REF
–
+Vref) results in code 0xFF. Code 0xFF is not reached, if (IN
0xFF
© 2011 Zentrum Mikroelektronik Dresden AG — Rev. 2.0
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without
the prior written consent of the copyright owner. The information furnished in this publication is PRELIMINARY and subject to
changes without notice.
–
can range from -0.2V … ½ V
Code Range
+
and IN
–
0x00
are generally allowed to swing between –0.2V and VDD+0.2V. However,
+
must exceed the voltage at IN
V
DD
-V
REF
V
IN-
REF
+
without limiting the Code Range, assuming the fore
Figure 7: Input voltage range for bipolar mode
if IN
¼ V
8.
V
V
V
0V
CM
REF
REF
¾
-V
Table 5 and Table 6 show the relationship of the
+
REF
ranges from IN
/2
–
–
+Vref) > VDD + 0.2V because the input
to obtain codes unequal to 0x00. The
V
CM
–
0V
to (IN
Range
+
and IN
–
+Vref). Any voltage on
–
+V
(see Functional
REF
/2
16 of 26
V
DIFF