EH2500ET-1.08M Ecliptek, EH2500ET-1.08M Datasheet - Page 4

• Manufacturer Part Number: EH2500ET-1.08M
• Description: Programmable Oscillators 1.08MHz -40C +85C 100ppm
• Manufacturer: Ecliptek

Specifications of EH2500ET-1.08M

• Product Category: Programmable Oscillators
• Rohs: yes
• Package / Case: 7 mm x 5 mm
• Frequency: 1.08 MHz
• Frequency Stability: 25 PPM
• Supply Voltage: 5 V
• Load Capacitance: 50 pF
• Termination Style: SMD/SMT
• Output Format: CMOS
• Minimum Operating Temperature: - 40 C
• Maximum Operating Temperature: + 85 C
• Dimensions: 5 mm W x 7 mm L x 1.6 mm H
• Mounting Style: SMD/SMT
• Product: Programmable

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What is oscillator aging and what are the aging specifications for this product series?
Aging is the systematic change in frequency with time due to internal changes in the crystal and/or oscillator.
Aging is often expressed as a maximum value in parts per million per year [ppm/year]. The rate of aging is
logarithmic in nature. The following factors effect oscillator aging: adsorption and desorption of contamination on
the surfaces of the quartz, stress relief of the mounting and bonding structures, material outgassing, and seal
integrity. The oscillator aging specification is listed on the datasheet.
What are the rms phase jitter and phase noise characteristics for this product series?
Peak to Peak and RMS Period Jitter is a time domain measurement and is specified in picoseconds (pSec) as a
maximum value. Phase noise is a measurement made in the frequency domain and is specified in decibels at
various offset points from the carrier (-dBc/Hz). Phase jitter, (often called offset jitter) is derived from the phase
noise measurement of the spectral density over a given offset bandwidth. Ecliptek uses a proprietary design,
exclusive processing methods and a unique ASIC output driver circuit enabling this product series to have low
phase jitter and phase noise. The period jitter parameter can be found on the datasheet.
What is duty cycle and what is the duty cycle specification for this product series?
Duty cycle is the measure of output waveform uniformity. This term, also referred to as symmetry, is a
measurement of the time that the output waveform is in a logic high state, expressed as a percentage (%) of the
clock period. This parameter is measured at a specified voltage threshold or at a percentage of the output
waveform amplitude. See the datasheet for measurement thresholds and load conditions.
What are the output and output load characteristics for this product series?
Ecliptek offers this product series with a high speed CMOS driver that enables the output signal to swing from
ground to V
performance. Signal integrity is optimized when the low impedance output of the oscillator is driving a high
impedance-low capacitance input. The output load specification is listed on the datasheet.
Is start-up time specified for this product series?
As shown in the figure below, start-up time is defined as the time (t
specified V
high level and the output is within the specified frequency tolerance.
EH25 TEN10-005-027 Rev B
IH
DD
value to the time (t
. The oscillator output topology is designed so as to optimize circuit load matching and signal
1
) the oscillator output signal amplitude reaches its steady state V
0
) from when the power supply reaches its
Ecliptek Frequently Asked Questions
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output logic
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