MAX11130ATI+ Maxim Integrated, MAX11130ATI+ Datasheet - Page 13

• Manufacturer Part Number: MAX11130ATI+
• Description: Analog to Digital Converters - ADC 10Bit 8Ch 3Msps Precision ADC
• Manufacturer: Maxim Integrated

Specifications of MAX11130ATI+

• Rohs: yes
• Number Of Channels: 8/4
• Architecture: SAR
• Conversion Rate: 3 MSPs
• Resolution: 10 bit
• Input Type: Single-Ended/Pseudo-Differential
• Snr: 61.5 dB
• Interface Type: 3-Wire, QSPI, SPI
• Operating Supply Voltage: 2.35 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: TQFN-28
• Maximum Power Dissipation: 2758 mW
• Minimum Operating Temperature: - 40 C
• Number Of Converters: 1
• Voltage Reference: 1 V

Maxim Integrated
26, 27, 28, 1–11
(16 CHANNEL)
MAX11129
MAX11131
14, 16
17, 18
TQFN
12
13
15
19
20
21
22
23
24
25
—
—
—
—
(16 CHANNEL)
MAX11131
TSSOP
17, 19
20, 21
1–14
15
16
18
22
23
24
25
26
27
28
—
—
—
—
26, 27, 28, 1–5
(8 CHANNEL)
6–11, 14, 16
3Msps, Low-Power, Serial 12-/10-Bit,
MAX11130
MAX11132
TQFN
17, 18
12
13
15
19
20
21
22
23
24
25
—
—
—
—
AIN0–AIN13 Analog Inputs
REF-/AIN15 External Differential Reference Negative Input /Analog Input 15
AIN0–AIN7
CNVST/
CNVST
NAME
DGND
AIN14
OVDD
DOUT
SCLK
REF+
REF-
GND
EOC
V
DIN
CS
EP
DD
Analog Inputs
Active-Low Conversion Start Input/Analog Input 14
Active-Low Conversion Start Input
External Differential Reference Negative Input
Ground
External Positive Reference Input. Apply a reference voltage at
REF+. Bypass to GND with a 0.47FF capacitor.
Power-Supply Input. Bypass to GND with a 10FF in parallel with
a 0.1FF capacitors.
Serial Clock Input. Clocks data in and out of the serial interface
Active-Low Chip Select Input. When CS is low, the serial
interface is enabled. When CS is high, DOUT is high
impedance or three-state.
Serial Data Input. DIN data is latched into the serial interface on
the rising edge of SCLK.
Digital I/O Ground
Interface Digital Power-Supply Input. Bypass to GND with a
10FF in parallel with a 0.1FF capacitors.
Serial Data Output. Data is clocked out on the falling edge of
SCLK. When CS is high, DOUT is high impedance or three-
state.
End of Conversion Output. Data is valid after EOC pulls low
(internal clock mode only).
Exposed Pad. Connect EP directly to GND plane for
guaranteed performance.
MAX11129–MAX11132
8-/16-Channel ADCs
FUNCTION
Pin Description
13