DS1100LU-150/T&R Maxim Integrated, DS1100LU-150/T&R Datasheet - Page 3

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DS1100LU-150/T&R

Manufacturer Part Number
DS1100LU-150/T&R
Description
Delay Lines / Timing Elements
Manufacturer
Maxim Integrated
Datasheet

Specifications of DS1100LU-150/T&R

Function
Active Tapped Delay Line
Package / Case
uSOP-8
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage - Max
3.6 V
Supply Voltage - Min
3 V
Part # Aliases
90-1100P-15L
CAPACITANCE
(T
NOTES:
1) Initial tolerances are ± with respect to the nominal value at +25°C and V
2) Temperature and voltage tolerance is with respect to the nominal delay value over the stated temperature
3) All tap delays tend to vary unidirectionally with temperature or voltage changes. For example, if TAP 1
4) Intermediate delay values are available on a custom basis. For further information, contact the factory at
5) All voltages are referenced to ground.
6) Measured with outputs open.
7) See Test Conditions section at the end of this data sheet.
8) Frequencies higher than 1MHz result in higher I
9) At or near maximum frequency the delay accuracy can vary and will be application sensitive (i.e.,
10) The “-75” version is specified and tested with an additional 2ns of tolerance on the specified minimum
Figure 1. LOGIC DIAGRAM
Figure 2. TIMING DIAGRAM: SILICON DELAY LINE
Input Capacitance
A
PARAMETER
= +25°C, unless otherwise noted.)
trailing edge.
range, and a supply-voltage range of 3.0V to 3.6V.
slows down, all other taps also slow down; TAP 3 can never be faster than TAP 2.
custom.oscillators@maxim-ic.com.
decoupling, layout).
input-to-tap delay tolerance parameter for TAP 1. Delay values for TAP 2 to TAP 5 meet data sheet
specifications.
SYMBOL
C
IN
CONDITIONS
CC
3 of 7
values.
MIN
TYP
5
CC
= 3.3V for both leading and
MAX
10
UNITS
pF
DS1100L
NOTES

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