307GI-03LFT IDT, 307GI-03LFT Datasheet
307GI-03LFT
Specifications of 307GI-03LFT
Related parts for 307GI-03LFT
307GI-03LFT Summary of contents
Page 1
... User selectable charge pump current and damping resistor • Power-down control via hardware pin or software control bit • Programming word can be generated by IDT VersaClock II Software • Directly programmable via VersaClock II Software and a Windows PC parallel port • Industrial temperature range available ...
Page 2
... Input 10 CS Input 11 DIN Input 12 CLK2 Output 13 GND Power 14 CLK3 Output 15 PD Input 16 X2 IDT® SERIALLY PROGRAMMABLE CLOCK SOURCE CLK3 13 GND 12 CLK2 11 DIN SCLK Pin XI Connect to input reference clock or crystal. Power connection for crystal oscillator. Power connection for PLL. ...
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... Table 2. VCO Divider Divide Value 2054 2055 IDT® SERIALLY PROGRAMMABLE CLOCK SOURCE Bits ...
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... Table 4. Loop Filter Resistor (R Bits Resistor Value IDT® SERIALLY PROGRAMMABLE CLOCK SOURCE ) CP Bits 92 91 128 127 Rule Icp = ([128...127]+1)*1.25 A*([ ...
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... IDT® SERIALLY PROGRAMMABLE CLOCK SOURCE Bits 102 101 100 Rule ...
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... IDT® SERIALLY PROGRAMMABLE CLOCK SOURCE Bits 116 115 114 113 Rule output divide = ([117..114]+2)*2^[113 ...
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... MHz. This is useful when the ICS307-03 needs to provide an initial system clock at power-up. IDT® SERIALLY PROGRAMMABLE CLOCK SOURCE SER PROG CLOCK SYNTHESIZER each of the pins X1 and X2 to ground as shown in the Block Diagram on page 1. The value (in pF) of these crystal caps ...
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... ICS307-03 SERIALLY PROGRAMMABLE CLOCK SOURCE Determining and Controlling the Output Frequency with VersaClock The ICS307-03 is directly supported by the IDT provided software called VersaClock II. Complete programming words for this device can be calculated on any Windows PC by running the VersaClock II software and simple inputting desired input and output frequencies ...
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... O FV Divider = 12 to 2055 The above equation calculates the “normalized” loop bandwidth (denoted as “NBW”) which is approximately equal to the - 3dB bandwidth. NBW does not take into account the effects of damping factor or the second pole imposed does, however, provide a useful P approximation of filter performance ...
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... The VersaClock II Software not only generates the programming word for the user, it can also be used to program the device via the host computer’s parallel port. Demonstration boards are available from IDT that allows the VersaClock II S/W to directly connect the ICS307- Windows based PC’s DB-25 parallel port connector and programmed simply by pressing the “ ...
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... Stresses above the ratings listed below can cause permanent damage to the ICS307-03. These ratings, which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. ...
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... Frequency Transition time One Sigma Clock Period Jitter Maximum Absolute Jitter VCO Frequency Divider 1 Input Divider 2 and 3 Inputs Note 1: Measured with 15 pF load. Note 2: Jitter performance will change depending on configuration settings. IDT® SERIALLY PROGRAMMABLE CLOCK SOURCE Symbol Conditions F Fundamental crystal IN Clock F ...
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... Pb-Free configuration, RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied ...
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... Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners ...