SST28VF040A200-4I-EH Silicon Storage Tech, SST28VF040A200-4I-EH Datasheet
SST28VF040A200-4I-EH
Related parts for SST28VF040A200-4I-EH
SST28VF040A200-4I-EH Summary of contents
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... Note, during the Software Data Protection sequence the addresses are latched on the rising edge of OE# or CE#, whichever occurs first. The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc. SSF is a trademark of Silicon Storage Technology, Inc. http://store.iiic.cc/ These specifications are subject to change without notice. ...
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... Reset command can be executed to terminate the Erase operation; however, if the Chip-Erase operation is termi- nated prior to the 20 ms time-out, the chip may not be com- pletely erased erase error occurs a Chip-Erase ©2007 Silicon Storage Technology, Inc. 4 Mbit SuperFlash EEPROM SST28SF040A / SST28VF040A command can be reissued as many times as necessary to complete the Chip-Erase operation ...
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... The address sequence is 1823H, 1820H, 1822H, 0418H, 041BH, 0419H, 041AH. The address bus is latched on the ©2007 Silicon Storage Technology, Inc. rising edge of OE# or CE#, whichever occurs first. A similar seven read sequence of 1823H, 1820H, 1822H, 0418H, 041BH, 0419H, 040AH will protect the device ...
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... FIGURE SSIGNMENTS FOR ©2007 Silicon Storage Technology, Inc. to use the software operation to identify the device (i.e., using the device ID). For details see Table 3 for the hardware operation and Figure 19 for the software operation. The manufacturer’s and device IDs are the same for both operations ...
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... Data Input/output 7 0 CE# Chip Enable OE# Output Enable WE# Write Enable V Power Supply DD V Ground SS 1. This pin has an internal pull-up resistor. ©2007 Silicon Storage Technology, Inc. Standard Pinout Top View Die Up 32- TSOP LEAD A18 A16 2 31 WE# A15 3 30 ...
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... Address 0000H retrieves the Manufacturer’ BFH and address 0001H retrieves the Device ID of 04H. 8. Refer to Figure 11 for the 7 Read Cycle sequence for Software-Data-Protect. 9. Refer to Figure 10 for the 7 Read Cycle sequence for Software-Data-Unprotect. TABLE EMORY RRAY ETAIL Sector Select ©2007 Silicon Storage Technology, Inc. OE# WE OUT V V ...
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... ANGE FOR Range Ambient Temp Commercial 0°C to +70°C Industrial -40°C to +85° ONDITIONS OF EST Input Rise/Fall Time . . . . . . . . . . . . . . 10 ns Output Load . . . . . . . . . . . . . . . . . . . . . 1 TTL Gate andC See Figures 14 and 15 ©2007 Silicon Storage Technology, Inc 4.5-5.5V 4.5-5. 2.7-3.6V 2.7-3.6V = 100 pF for SST28SF040A 100 pF for SST28VF040A L 7 http://store ...
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... Input Low Voltage IL V Input High Voltage IH V Output Low Voltage OL V Output High Voltage OH V Supervoltage for Supervoltage Current for A H ©2007 Silicon Storage Technology, Inc. SST28SF040A Limits Min Max Units Test Conditions Address input CE#=OE#= CE#=WE#= CE#=V 20 µ ...
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... N Endurance END 1 T Data Retention Latch Up LTH 1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. ©2007 Silicon Storage Technology, Inc OWER UP IMINGS Minimum Specification 10,000 100 100 + http://store.iiic.cc/ ...
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... OE# High to High-Z Output OHZ 1 tAXQX T Output Hold from Address Change OH 1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. ©2007 Silicon Storage Technology, Inc. 4 Mbit SuperFlash EEPROM SST28SF040A / SST28VF040A SST28SF040A SST28SF040A-90 Min Max 90 ...
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... PCH 1 T Protect Address Setup Time PAS 1 T Protect Address Hold Time PAH 1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. ©2007 Silicon Storage Technology, Inc IMING ARAMETERS SST28SF040A Min ...
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... CE# OE# WE# DQ 7-0 FIGURE EAD YCLE IMING ADDRESS A 18-0 CE# OE# WE# DQ 7-0 I0H BYTE-PROGRAM SETUP COMMAND FIGURE 5: WE# C ONTROLLED ©2007 Silicon Storage Technology, Inc OLZ T CLZ DATA VALID D IAGRAM OEH T OES WPH ...
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... WE# DQ 7-0 I0H T DS BYTE-PROGRAM SETUP COMMAND FIGURE 6: CE ONTROLLED ADDRESS A 18-0 CE# OE# WE 7-0 FIGURE ESET OMMAND ©2007 Silicon Storage Technology, Inc CPH T OES DATA VALID YTE ROGRAM YCLE ...
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... HIP RASE IMING ADDRESS A 18 CE# OE# WE 7-0 20H SETUP COMMAND FIGURE ECTOR RASE IMING ©2007 Silicon Storage Technology, Inc 30H T SCE EXECUTE COMMAND D IAGRAM D0H T SE EXECUTE COMMAND D IAGRAM 14 http://store.iiic.cc/ ...
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... T PAS NOTE: A. ADDRESSES ARE LATCHED INTERNALLY ON THE RISING EDGE OF: FIGURE 11 OFTWARE ATA ©2007 Silicon Storage Technology, Inc. T PCH 1820 1822 0418 041B 1. OE# IF CE# IS KEPT AT LOW ALL TIME. 2. CE# IF OE# IS KEPT AT LOW ALL TIME. 3. THE FIRST PIN TO GO HIGH IF BOTH ARE TOGGLED. ...
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... ADDRESS A 18-0 CE# T OEH OE WE NOTE: THIS TIME INTERVAL SIGNAL CAN DEPENDING UPON THE SELECTED OPERATION MODE. FIGURE 13 OGGLE IT IMING ©2007 Silicon Storage Technology, Inc OEH NOTE D IAGRAM NOTE D ...
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... HT FIGURE 14 NPUT UTPUT TO DUT FIGURE 15 EST OAD XAMPLE ©2007 Silicon Storage Technology, Inc REFERENCE POINTS V LT (0.4 V) for a logic “0”. Measurement reference points for ILT (0.8 V). Input rise and fall times (10 EFERENCE AVEFORMS TO TESTER LOW 17 http://store ...
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... EOL Data Sheet Next Address FIGURE 16 YTE ROGRAM LOWCHART ©2007 Silicon Storage Technology, Inc. Start Initialize Address Execute Byte- Program Setup Command Load Address and Data & Start Programming Read End-of-Write Detection No Programming Completed? Yes No Data Verifies? Yes ...
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... Mbit SuperFlash EEPROM SST28SF040A / SST28VF040A Internal Timer Program/Erase Initiated Wait Program/Erase Completed FIGURE 17 RITE AIT PTIONS ©2007 Silicon Storage Technology, Inc. Toggle Bit Program/Erase Initiated Read byte Read same byte No Does DQ 6 match? Yes Program/Erase Completed 19 http://store.iiic.cc/ ...
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... EOL Data Sheet Increment Byte Address Next Sector Address FIGURE 18 ECTOR RASE LOWCHARTS ©2007 Silicon Storage Technology, Inc. 4 Mbit SuperFlash EEPROM SST28SF040A / SST28VF040A Start Initialize Sector Address Execute Two Step Sector-Erase Command End-of-Write Detection Erase No completed? Yes Read FFH from ...
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... Mbit SuperFlash EEPROM SST28SF040A / SST28VF040A FIGURE 19 OFTWARE RODUCT ©2007 Silicon Storage Technology, Inc. Execute Read ID Command (90H) to Enter Read-ID mode Read Address 0000H MFG SST (BFH) Read Address 0001H Device ID = 28SF040 (04H) Execute Reset Command (FFH) to Exit from Read-ID mode 310 ILL F18 ...
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... The non-Pb part number is simply the standard part number with the letter “E” added to the end of the package code. The non-Pb package codes corresponding to the packages listed above are NHE and EHE. ©2007 Silicon Storage Technology, Inc. 4 Mbit SuperFlash EEPROM ...
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... Dimensions do not include mold flash. Maximum allowable mold flash is .008 inches. 4. Coplanarity: 4 mils. 32 LEAD LASTIC EAD HIP ARRIER SST ACKAGE ODE ©2007 Silicon Storage Technology, Inc. SIDE VIEW .112 .106 .029 .020 R. .040 x 30˚ R. .023 .030 MAX. .021 .013 .400 .032 BSC ...
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... LEAD HIN MALL UTLINE ACKAGE SST ACKAGE ODE ©2007 Silicon Storage Technology, Inc. 18.50 18.30 (TSOP http://store.iiic.cc/ 4 Mbit SuperFlash EEPROM SST28SF040A / SST28VF040A 1.05 0.95 0.50 BSC 8.10 0.27 7 ...
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... Clarified the Test Conditions for V Table 7 on page 8 – Address input = V 06 • EOL all products in this data sheet Silicon Storage Technology, Inc. • 1171 Sonora Court • Sunnyvale, CA 94086 • Telephone 408-735-9110 • Fax 408-735-9036 ©2007 Silicon Storage Technology, Inc. 1.655 1.645 .200 .170 ...