MX29LV320ETTI-70G Macronix, MX29LV320ETTI-70G Datasheet - Page 20

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MX29LV320ETTI-70G

Manufacturer Part Number
MX29LV320ETTI-70G
Description
MX29LV Series 3 V 32 Mb (4M x 8/2M x 16) 70 ns Parallel Flash - TSOP-48
Manufacturer
Macronix
Datasheet

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MX29LV320E T/B
FUNCTIONAL OPERATION DESCRIPTION (cont'd)
READ INDICATOR BIT (Q7) FOR SECURITY SECTOR
To determine if the Security Sector has been locked at the factory, the system performs a READ OPERATION
with A9 raised to Vhv, address pin A6 held LOW, and address pins A1 & A0 held HIGH. If the Security Sector
has been locked at the factory, the code 99h will be present on data bits Q7 to Q0. Otherwise, the factory
unlocked code of 19h will be present.
INHERENT DATA PROTECTION
To avoid accidental erasure or programming of the device, the device is automatically reset to Read mode during
power up. Additionally, the following design features protect the device from unintended data corruption.
COMMAND COMPLETION
Only after the successful completion of the specified command sets will the device begin its erase or program
operation. If any command sequence is interrupted or given an invalid command, the device immediately returns
to Read mode.
LOW VCC WRITE INHIBIT
The device refuses to accept any write command when Vcc is less than Vlko. This prevents data from spuriously
being altered during power-up, power-down, or temporary power interruptions. The device automatically resets
itself when Vcc is lower than Vlko and write cycles are ignored until Vcc is greater than Vlko. The system must
provide proper signals on control pins after Vcc rises above Vlko to avoid unintentional program or erase opera-
tions.
WRITE PULSE "GLITCH" PROTECTION
CE#, WE#, OE# pulses shorter than 5ns are treated as glitches and will not be regarded as an effective write
cycle.
LOGICAL INHIBIT
A valid write cycle requires both CE# and WE# at Vil with OE# at Vih. Write cycle is ignored when either CE# at
Vih, WE# a Vih, or OE# at Vil.
POWER-UP SEQUENCE
Upon power up, the MX29LV320E T/B is placed in Read mode. Furthermore, program or erase operation will be-
gin only after successful completion of specified command sequences.
P/N:PM1575
REV. 1.2, MAY 23, 2011
20

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