HC55185EVAL1 Intersil, HC55185EVAL1 Datasheet
HC55185EVAL1
Related parts for HC55185EVAL1
HC55185EVAL1 Summary of contents
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... Limit the current on all power supplies to 100mA. 2. Turn on the power supplies after the power cables are attached to the evaluation boards. FIGURE 1. EVALUATION BOARD SILK SCREEN | Intersil and Design is a trademark of Intersil Corporation. AN9814.2 RSLIC18™ trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000 ...
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Evaluation Board Functional Description J4 J3 JP1 J2 J1 Evaluation Board Jumper Definitions JUMPER JP1 Connects SW- directly to the device Ring terminal of device. Used in conjunction with external load D JP2 Connects SW+ through test load to the ...
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Test Points Each connector interface to the evaluation board has a test point. All test points are DC coupled and should be guarded against ground shorts. High impedance test inputs, such as oscilloscopes or DVMs, should be used to monitor ...
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Stand Alone Configuration Description The stand alone configuration supports any measurement of the HC55185 device. With all the jumper locations open, the device is totally isolated from all other active circuitry on the evaluation board. All ...
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Stand Alone Configuration Typical Measurements Supply Currents (milli amps Hook OPERATING MODE F2, F1, F0 Low Power Standby Forward Active Unused Reverse Active Ringing 1, 0, ...
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Ringing Configuration Description The ringing configuration supports full evaluation of the ringing capability of the HC55185 device. The evaluation board design does not include a 20Hz digital code generator, therefore, all ringing waveforms will ...
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Digital Loop Back Configuration FIGURE 6. DIGITAL LOOP BACK CONNECTORS AND JUMPERS Description The digital loop back configuration verifies the interface and operation of the HC55185 device and the CODEC. This configuration provides a ...
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PCM4 Configuration Description The PCM4 configuration verifies the AC transmission of the HC55185 and CODEC. Any piece of test equipment capable of PCM testing with digital and analog interfaces can be used in this ...
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PCM4 Configuration Typical Measurements MODE A 33 VAR. GAIN/FRE. TX: +1 RESULT +0.0 dB -1.0 -1.5 200 1000 2000 TX +0.00 dBm0 201Hz FIGURE 9. DIGITAL TO ANALOG GAIN vs FREQUENCY MODE A 43 ...
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Back to Back Configuration MASTER SECONDARY POWER CABLE FIGURE 15. BACK TO BACK CONNECTORS AND JUMPERS Description The back to back configuration connects two evaluation boards together at the PCM interface. The PCM output ...
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Basic Application Circuit Component List COMPONENT VALUE TOLERANCE U1 - Ringing SLIC HC55185 R 20k RT R 49. 71. 66. 17. 0. ...
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Evaluation Board Schematic V + +5V VBL CPS3 CPS4 ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...