MAX3748HETETG16 Maxim Integrated Products, Inc., MAX3748HETETG16 Datasheet - Page 8
![no-image](/images/no-image-200.jpg)
MAX3748HETETG16
Manufacturer Part Number
MAX3748HETETG16
Description
Max3748, Max3748a, Max3748b Compact 155mbps To 4.25gbps Limiting Amplifier
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
1.MAX3748HETETG16.pdf
(13 pages)
The MAX3748/MAX3748A/MAX3748B limiting amplifi-
er’s CML output provides high tolerance to impedance
mismatches and inductive connectors. The output cur-
rent is approximately 18mA. The output is disabled by
connecting the DISABLE pin to V
connected to the DISABLE pin, the outputs OUT+ and
OUT- are at a static voltage (squelch) whenever the
input signal level drops below the LOS threshold. The
output buffer can be AC- or DC-coupled to the load
(Figure 4). The MAX3748B has an improved common-
mode output for reduced electromagnetic interference.
The MAX3748/MAX3748A/MAX3748B are equipped with
an LOS circuitry, which indicates when the input signal is
below a programmable threshold, set by resistor R
the TH pin (see Typical Operating Characteristics for
appropriate resistor sizing). An averaging peak-power
detector compares the input signal amplitude with this
threshold and feeds the signal detect information to the
LOS output, which is open collector. Two control volt-
ages, V
and deassert levels. To prevent LOS chatter in the region
of the programmed threshold, approximately 2dB of hys-
teresis is built into the LOS assert/deassert function. Once
asserted, LOS is not deasserted until the input amplitude
rises to the required level (V
Compact 155Mbps to 4.25Gbps
Limiting Amplifier
Figure 4. CML Output Buffer
8
DISABLE
DATA
_______________________________________________________________________________________
DISABLE
ASSERT
Q3
and V
Q4
18mA
DEASSERT
DISABLE
50Ω
Loss-of-Signal Indicator
DEASSERT
Q1
V
CC
CML Output Buffer
, define the LOS assert
Power-Detect and
Q2
18mA
CC
50Ω
) (Figure 5).
. If the LOS pin is
STRUCTURES
OUT+
OUT-
ESD
TH
at
The MAX3748HETE is the MAX3748A in a hybrid lead-
free package. The MAX3748BETE# is also available in
a hybrid lead-free package. The hybrid part contains
leaded bumps in a lead-free thin QFN package. The
part is not 100% lead-free; however, the high-lead sol-
der in the internal portion of the part does meet the
RoHS exemption for high-lead solders. For more infor-
mation, visit www.maxim-ic.com/emmi/.
External resistor R
the Assert/Deassert Levels vs. R
Operating Characteristics to select the appropriate
resistor.
When AC-coupling is desired, coupling capacitors C
and C
er’s deterministic jitter. Jitter is decreased as the input
low-frequency cutoff (f
For ATM/SONET or other applications using scrambled
NRZ data, select (C
f
other applications using 8B/10B data coding, select
(C
Refer to Application Note HFAN-1.1: Choosing AC-
Coupling Capacitors.
Figure 5. MAX3748 LOS Output Circuit
IN
IN
< 32kHz. For Fibre Channel, Gigabit Ethernet, or
, C
OUT
OUT
Program the LOS Assert Threshold
should be selected to minimize the receiv-
) ≥ 0.01µF, which provides f
Select the Coupling Capacitor
f
IN
TH
= 1 / [2π(50)(C
IN
Hybrid Lead-Free Package
programs the LOS threshold. See
IN
, C
GND
V
CC
) is decreased:
OUT
Design Procedure
) ≥ 0.1µF, which provides
TH
IN
graph in the Typical
)]
IN
< 320kHz.
ESD
STRUCTURE
LOS
IN