74F537PC Fairchild Semiconductor, 74F537PC Datasheet
74F537PC
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74F537PC Summary of contents
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... Package Number 74F537SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74F537PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. ...
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Unit Loading/Fan Out Pin Names Description A –A Address Inputs Enable Input (Active LOW Enable Input (Active HIGH Output Enable Input (Active LOW) P Polarity Control Input O –O 3-STATE Outputs 0 9 ...
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Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. 3 www.fairchildsemi.com ...
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Absolute Maximum Ratings Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias V Pin Potential to Ground Pin CC Input Voltage (Note 2) Input Current (Note 5.0 mA Voltage Applied to Output in HIGH State ...
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AC Electrical Characteristics Symbol Parameter t Propagation Delay PLH PHL Propagation Delay PLH PHL Propagation Delay PLH PHL Propagation ...
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Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide www.fairchildsemi.com Package Number M20B 6 ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...