AT25256B-SSHL-B-RET Atmel, AT25256B-SSHL-B-RET Datasheet - Page 7

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AT25256B-SSHL-B-RET

Manufacturer Part Number
AT25256B-SSHL-B-RET
Description
Manufacturer
Atmel
Datasheet
8698C–SEEPR–8/11
3.
Functional Description
The Atmel
of the 6800 type series of microcontrollers.
The AT25128B/256B utilizes an 8-bit instruction register. The list of instructions and their operation codes are con-
tained in
low CS transition.
Table 3-1.
WRITE ENABLE (WREN): The device will power-up in the write disable state when V
ming instructions must therefore be preceded by a Write Enable instruction.
WRITE DISABLE (WRDI): To protect the device against inadvertent writes, the Write Disable instruction disables
all programming modes. The WRDI instruction is independent of the status of the WP pin.
READ STATUS REGISTER (RDSR): The Read Status Register instruction provides access to the status register.
The Ready/Busy and Write Enable status of the device can be determined by the RDSR instruction. Similarly, the
Block Write Protection bits indicate the extent of protection employed. These bits are set by using the WRSR
instruction.
Table 3-2.
Table 3-3.
Instruction Name
WREN
WRDI
RDSR
WRSR
READ
WRITE
Bit
Bit 0 (RDY)
Bit 1 (WEN)
Bit 2 (BP0)
Bit 3 (BP1)
Bits 4 – 6 are 0s when device is not an internal write cycle
Bit 7 (WPEN)
Bits 0 – 7 are “1”s during an internal write cycle
WPEN
Bit 7
Table
®
AT25128B/256B is designed to interface directly with the synchronous serial peripheral interface (SPI)
Instruction Set for Atmel AT25128B/256B
Status Register Format
Read Status Register Bit Definition
3-1. All instructions, addresses, and data are transferred with the MSB first and start with a high-to-
Bit 6
X
Instruction Format
0000 X110
0000 X100
0000 X101
0000 X001
0000 X011
0000 X 010
Bit 5
Definition
Bit 0 = “0” (RDY) indicates the device is ready
Bit 0 = “1” indicates the write cycle is in progress
Bit 1 = 0 indicates the device is not write enabled
Bit 1 = “1” indicates the device is write enabled
See
See
See
X
Table 3-4 on page 8
Table 3-4 on page 8
Table 3-5 on page 8
Bit 4
X
Operation
Set Write Enable Latch
Reset Write Enable Register
Read Status Register
Write Status Register
Read Data from Memory Array
Write Data to Memory Array
Bit 3
BP1
Bit 2
BP0
Atmel AT25128B/256B
WEN
Bit 1
Bit 0
RDY
CC
is applied. All program-
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