MC100LVEL56DWG ON Semiconductor, MC100LVEL56DWG Datasheet

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MC100LVEL56DWG

Manufacturer Part Number
MC100LVEL56DWG
Description
IC MULTIPLXR 2:1 DUAL ECL 20SOIC
Manufacturer
ON Semiconductor
Series
100LVELr
Type
Differential Digital Multiplexerr
Datasheet

Specifications of MC100LVEL56DWG

Circuit
2 x 2:1
Independent Circuits
1
Voltage Supply Source
Dual Supply
Voltage - Supply
3 V ~ 3.8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-SOIC (7.5mm Width)
Product
Decoders, Encoders, Multiplexers & Demultiplexers
Logic Family
MC100L
Number Of Lines (input / Output)
2.0 / 2.0
Propagation Delay Time
0.62 ns at 3.3 V
Supply Voltage (max)
- 3.8 V, + 3.8 V
Supply Voltage (min)
- 3 V, + 3 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Input Lines
2.0
Number Of Output Lines
2.0
Logic Type
Multiplexer
No. Of Channels
2
Ratio
2
Supply Voltage Range
3V To 3.8V
Logic Case Style
SOIC
No. Of Pins
20
Operating Temperature Range
-40°C To +85°C
Filter Terminals
SMD
Rohs Compliant
Yes
Family Type
ECL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output High, Low
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
MC100LVEL56DWGOS
MC100LVEL56
3.3V ECL Dual Differential
2:1 Multiplexer
Description
differential data path makes the device ideal for multiplexing low skew
clock or other skew sensitive signals.
address both data path and random logic applications.
stability under open input conditions. When both differential inputs are
left open the D input will pull down to V
around V
this device only. For single-ended input conditions, the unused
differential input is connected to V
V
V
0.5 mA. When not used, V
Features
*For additional information on our Pb−Free strategy and soldering details, please
© Semiconductor Components Industries, LLC, 2008
November, 2008 − Rev. 12
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
BB
CC
The MC100LVEL56 is a dual, fully differential 2:1 multiplexer. The
The device features both individual and common select inputs to
The differential inputs have special circuitry which ensures device
The V
V
V
580 ps Typical Propagation Delays
Separate and Common Select
The 100 Series Contains Temperature Compensation
PECL Mode Operating Range:
NECL Mode Operating Range:
Internal Input Pulldown Resistors on D(s), SEL(s), and COM_SEL
Q Output will Default LOW with Inputs Open or at V
Pb−Free Packages are Available*
CC
CC
may also rebias AC coupled inputs. When used, decouple V
via a 0.01 mF capacitor and limit current sourcing or sinking to
= 3.0 V to 3.8 V with V
= 0 V with V
BB
CC
/2 forcing the Q output LOW.
pin, an internally generated voltage supply, is available to
EE
= −3.0 V to −3.8 V
BB
should be left open.
EE
BB
= 0 V
as a switching reference voltage.
EE
, The D input will bias
EE
1
BB
and
*For additional marking information, refer to
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
Application Note AND8002/D.
ORDERING INFORMATION
20
A
WL
YY
WW
G
1
MARKING DIAGRAM*
http://onsemi.com
AWLYYWWG
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
DW SUFFIX
CASE 751D
SO−20 WB
100LVEL56
Publication Order Number:
MC100LVEL56/D

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MC100LVEL56DWG Summary of contents

Page 1

... Q Output will Default LOW with Inputs Open • Pb−Free Packages are Available* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2008 November, 2008 − Rev. 12 ...

Page 2

SEL0 SEL1 D0a D0a V D0b D0b D1a BBO Warning: All V and V pins must be externally connected ...

Page 3

Table 4. MAXIMUM RATINGS Symbol Parameter V PECL Mode Power Supply CC V NECL Mode Power Supply EE V PECL Mode Input Voltage I NECL Mode Input Voltage I Output Current out I V Sink/Source Operating Temperature ...

Page 4

Table 6. LVNECL DC CHARACTERISTICS Symbol Characteristic I Power Supply Current EE V Output HIGH Voltage (Note Output LOW Voltage (Note Input HIGH Voltage (Single−Ended Input LOW Voltage (Single−Ended Output ...

Page 5

FREQUENCY (MHz) Figure Driver Device Figure 3. Typical Termination ...

Page 6

... ORDERING INFORMATION Device MC100LVEL56DW MC100LVEL56DWG MC100LVEL56DWR2 MC100LVEL56DWR2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Resource Reference of Application Notes AN1405/D AN1406/D AN1503/D AN1504/D AN1568/D AN1672/D AND8001/D − Odd Number Counters Design AND8002/D − ...

Page 7

... Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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