MT46V32M16P-5B IT:F TR Micron, MT46V32M16P-5B IT:F TR Datasheet
MT46V32M16P-5B IT:F TR
Related parts for MT46V32M16P-5B IT:F TR
MT46V32M16P-5B IT:F TR Summary of contents
Page 1
... Window 1.6ns ±0.70ns 2.1ns ±0.70ns 2.0ns ±0.70ns 2.5ns ±0.75ns 2.5ns ±0.75ns Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Features Marking 128M4 64M8 32M16 ...
Page 2
... BA1) 4K (A0–A9, A11, A12) Yes Yes Yes Yes Yes Yes – Yes – – – – -6/-6T -75E Example Part Number: MT46V32M16P-6T:F - Sp. Configuration Package Speed Op. Temp. 128 Meg x 4 128M4 64 Meg x 8 64M8 32 Meg x 16 32M16 Package TG 400-mil TSOP 400-mil TSOP (Pb-free) ...
Page 3
... SELF REFRESH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .88 Power-down (CKE Not Active .90 PDF: 09005aef80a1d9d4/Source: 09005aef82a95a3a 512Mb_DDRTOC.fm - 512Mb DDR: Rev. N; Core DDR Rev. B 2/09 EN 512Mb: x4, x8, x16 DDR SDRAM Micron Technology, Inc., reserves the right to change products or specifications without notice. 3 ©2000 Micron Technology, Inc. All rights reserved. Table of Contents ...
Page 4
... ACT = ACTIVE BST = BURST TERMINATE CKEH = Exit power-down CKEL = Enter power-down EMR = Extended mode register LMR = LOAD MODE REGISTER MR = Mode register Micron Technology, Inc., reserves the right to change products or specifications without notice. 4 512Mb: x4, x8, x16 DDR SDRAM State Diagram Self refresh REFS ...
Page 5
... Any specific requirement takes precedence over a general statement. PDF: 09005aef80a1d9d4/Source: 09005aef82a95a3a DDR_x4x8x16_Core1.fm - 512Mb DDR: Rev. N; Core DDR Rev. B 2/09 EN 512Mb: x4, x8, x16 DDR SDRAM Functional Description Micron Technology, Inc., reserves the right to change products or specifications without notice. 5 ©2000 Micron Technology, Inc. All rights reserved. ...
Page 6
... Ambient and case temperatures cannot be less than –40°C or greater than +105°C PDF: 09005aef80a1d9d4/Source: 09005aef82a95a3a DDR_x4x8x16_Core1.fm - 512Mb DDR: Rev. N; Core DDR Rev. B 2/09 EN 512Mb: x4, x8, x16 DDR SDRAM Functional Description Micron Technology, Inc., reserves the right to change products or specifications without notice. 6 ©2000 Micron Technology, Inc. All rights reserved. ...
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... MASK WRITE 8 2 FIFO & DRIVERS DATA Out In CK COL0 Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. CK DLL DRVRS DQ0–DQ3 DQS DQS RCVRS DM 1 ...
Page 8
... FIFO (x32) & DRIVERS COLUMN DATA Out In CK COL0 Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. CK DLL DRVRS 1 DQ0–DQ7 DQS DQS 1 RCVRS DLL DRVRS DQ0– ...
Page 9
... BA1 BA1 27 A10/AP A10/ Micron Technology, Inc., reserves the right to change products or specifications without notice. 9 512Mb: x4, x8, x16 DDR SDRAM x16 DQ7 NF 65 DQ15 ...
Page 10
... DDR SDRAM DNU DNU DQ1 Q DQ3 DQ5 Q DQ7 DNU Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. ...
Page 11
... Data input/output: Data bus for x16. I/O Data input/output: Data bus for x8. I/O Data input/output: Data bus for x4. Micron Technology, Inc., reserves the right to change products or specifications without notice. 11 512Mb: x4, x8, x16 DDR SDRAM LOW level HIGH, after which it ©2000 Micron Technology, Inc. All rights reserved. ...
Page 12
... Do not use: Must float to minimize noise on V Type Description Input Address input A13 for 1Gb devices. Micron Technology, Inc., reserves the right to change products or specifications without notice. 12 512Mb: x4, x8, x16 DDR SDRAM . REF ©2000 Micron Technology, Inc. All rights reserved. ...
Page 13
... DDR: Rev. N; Core DDR Rev. B 2/09 EN 512Mb: x4, x8, x16 DDR SDRAM SEE DETAIL A 0.71 0.10 (2X) 11.76 ±0.20 10.16 ±0.08 +0.03 0.15 –0.02 +0.10 0.10 0.10 1.20 MAX Micron Technology, Inc., reserves the right to change products or specifications without notice. 13 Package Dimensions GAGE PLANE –0.05 0.80 TYP 0.50 ±0.10 DETAIL A ©2000 Micron Technology, Inc. All rights reserved. 0.25 ...
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... Sn, 36% Pb 96.5% Sn, 3% Ag, 0.5% Cu SOLDER BALL PAD: Ø .33 NON SOLDER MASK DEFINED SUBSTRATE: PLASTIC LAMINATE MOLD COMPOUND: EPOXY NOVOLAC BALL #1 ID 1.20 MAX Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. ...
Page 15
... Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. DD Units Notes ...
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... Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. DD Units Notes ...
Page 17
... Micron Technology, Inc., reserves the right to change products or specifications without notice. 17 512Mb: x4, x8, x16 DDR SDRAM Electrical Specifications – RFC REFI 9 n/a n/a 8 n/a n/a 10 n/a n/a 11 n/a n/a 9 n/a n/a 9 n/a n/a 8 n/a n/a 10 n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n n/a 10 1,029 n/a 10 1,029 n/a 12 1,288 ...
Page 18
... Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Units ° +2.6V ±0.1V DD Notes V 37 37, 42 ...
Page 19
... Max Units V + 0.310 – REF – 0.310 REF 0.49 × 0.51 × Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. = +2.5V ±0.2V Notes V 37 37, 42 ...
Page 20
... V TT 25Ω Reference 25Ω point Micron Technology, Inc., reserves the right to change products or specifications without notice. 20 512Mb: x4, x8, x16 DDR SDRAM Electrical Specifications – DC and AC Receiver ©2000 Micron Technology, Inc. All rights reserved ...
Page 21
... DD DD Maximum clock level Minimum clock level 0.3V or more negative than V DD Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Notes ...
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... I Symbol Min DC – IOL DC – IOU DC – – Micron Technology, Inc., reserves the right to change products or specifications without notice. 22 Max Units Notes 5.0 pF 3.0 pF 3.0 pF 3.0 pF Max Units Notes ...
Page 23
... CK 10 – – 0.25 – – 0.4 0.6 CK Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Notes 31 52 46 26 19 ...
Page 24
... DDR SDRAM Electrical Specifications – DC and AC -5B Min Max Units 15 – – – 200 – DQSQ ns Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Notes 26 ...
Page 25
... CK t 0.4 0 – – 0.25 – CK Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Notes 31 46 26 19, 43 26 ...
Page 26
... Electrical Specifications – DC and AC -6 (FBGA) Min Max Units 0 – 0.4 0 – – – 200 – DQSQ ns Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Notes 21 ...
Page 27
... CK t 0.4 0 – – 0.25 – CK Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Notes 31 46 26 19, 43 26 ...
Page 28
... Electrical Specifications – DC and AC -6T (TSOP) Min Max Units 0 – 0.4 0 – – – 200 – DQSQ ns Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Notes 21 ...
Page 29
... CK t 0.4 0 – – 0.25 – CK Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Notes 31 46 26 19, 43 26 ...
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... Electrical Specifications – DC and AC -75E Min Max Units 0 – 0.4 0 – – – 200 – DQSQ ns Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Notes 21 ...
Page 31
... CK t 0.4 0 – – 0.25 – – ns Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Notes 27 26 19 ...
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... DDR SDRAM Electrical Specifications – DC and AC -75Z Min Max Units t 0.4 0 – – – 200 – DQSQ ns Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Notes 20 26 ...
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... Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Notes 27 26 19 ...
Page 34
... Units 0.4 0.6 tCK 15 – – – 200 – DQSQ 0.50 0.55 0.60 Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Notes 20 26 Units Units ...
Page 35
... Q = +2.5V ±0.2V Q/2, V (peak-to-peak) = 0.2V. DM input is DD OUT t IS has an additional 50ps per each t IH has 0ps added, that is, it Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. may not REF = V , REF SS ...
Page 36
... MIN) then it must not transition LOW (below t DQSS that meets the t RAS (MAX) for RFC [MIN]), else CKE is LOW (that is, during Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. measure RAS. t CK/2), ...
Page 37
... CK = 7.5ns -75E / - 7.5ns - 6ns - 6ns - 5ns 2.56 2.53 2.49 2.45 2.41 2.31 2.28 2.24 2.20 2.16 1.95 1.92 1.89 1.86 1.83 1.85 1.82 1.79 1.76 1.73 1.48 1.45 1.43 1.40 1.38 47/53 46/ (MIN) actually applied to the device CK 300mV or 2.2V (2.4V for – Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. 2.38 2.13 1.80 1.70 1.35 45/55 t RAS (MIN) ...
Page 38
... V-I curve of Figure 16. 38 512Mb: x4, x8, x16 DDR SDRAM Electrical Specifications – DC and AC 2.0 2 Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. ...
Page 39
... Electrical Specifications – DC and AC 2.0 2.5 2.0 2.5 level and the referenced test DD pulse width ≤ 3ns, and the pulse t RPST (MAX) condition. Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. 1.5V – (MIN) will ...
Page 40
... V the input pin. 46. The current Micron part operates below 83 MHz (slowest specified JEDEC operating frequency). As such, future die may not reflect this option. 47. When an input signal is HIGH or LOW defined as a steady state logic HIGH or LOW. 48. Random address is changing ...
Page 41
... Micron Technology, Inc., reserves the right to change products or specifications without notice. 41 Pull-Up Current (mA) Nominal High Min Max –7.6 –4.6 –10.0 –14.5 –9.2 –20.0 –21.2 –13.8 –29.8 –27.7 –18.4 –38.8 – ...
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... Micron Technology, Inc., reserves the right to change products or specifications without notice. 42 Pull-Up Current (mA) Nominal High Min Max –4.3 –2.6 –5.0 –7.8 –5.2 –9.9 –12.0 –7.8 –14.6 –15.7 –10.4 –19.2 –19.3 –13.0 –23.6 –22.9 – ...
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... Micron Technology, Inc., reserves the right to change products or specifications without notice. 43 Commands Address Notes Bank/row 2 Bank/col 3 L Bank/col Code Op-code 8 DQ ...
Page 44
... RCD has been met. No data has been met. Once RP is met, the bank has been met. Once RP is met, the bank Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Commands Notes ...
Page 45
... XSNR has been met (if the previous state was self refresh). 45 512Mb: x4, x8, x16 DDR SDRAM is HIGH (see Table 33 on page 47) and n Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Commands t RFC ...
Page 46
... Minimum Delay with Concurrent Auto Precharge (BL/2)] × WTR t (BL/2) × (BL/2) × [CL (BL/2)] × Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Commands t WR measured as ...
Page 47
... RPST); for a WRITE, CKE must stay HIGH until the must be powered within the spec- REF t MRD is met. Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Commands Notes 7 t XSNR period. ...
Page 48
... PDF: 09005aef80a1d9d4/Source: 09005aef82a95a3a DDR_x4x8x16_Core2.fm - 512Mb DDR: Rev. N; Core DDR Rev. B 2/09 EN HIGH Row Bank Don’t Care Micron Technology, Inc., reserves the right to change products or specifications without notice. 48 512Mb: x4, x8, x16 DDR SDRAM Commands ©2000 Micron Technology, Inc. All rights reserved. ...
Page 49
... PDF: 09005aef80a1d9d4/Source: 09005aef82a95a3a DDR_x4x8x16_Core2.fm - 512Mb DDR: Rev. N; Core DDR Rev. B 2/09 EN HIGH Col EN AP DIS AP Bank Don’t Care Micron Technology, Inc., reserves the right to change products or specifications without notice. 49 512Mb: x4, x8, x16 DDR SDRAM Commands ©2000 Micron Technology, Inc. All rights reserved. ...
Page 50
... Ai is the most significant column address bit for a given density ( HIGH Col EN AP DIS AP Bank Don’t Care Micron Technology, Inc., reserves the right to change products or specifications without notice. 50 512Mb: x4, x8, x16 DDR SDRAM Commands ©2000 Micron Technology, Inc. All rights reserved. ...
Page 51
... DDR_x4x8x16_Core2.fm - 512Mb DDR: Rev. N; Core DDR Rev. B 2/09 EN HIGH All banks One bank Bank1 Don’t Care Micron Technology, Inc., reserves the right to change products or specifications without notice. 51 512Mb: x4, x8, x16 DDR SDRAM Commands ©2000 Micron Technology, Inc. All rights reserved. ...
Page 52
... Issue an AUTO REFRESH command. This may be moved prior to step 13. 18. Wait at least 19. Although not required by the Micron device, JEDEC requires an LMR command to clear the DLL bit (set LMR command is issued, the same operating parameters should be utilized as in step 11. ...
Page 53
... Assert NOP or DESELECT for t RFC time Optional LMR command to clear DLL bit Assert NOP or DESELECT for t MRD time DRAM is ready for any valid command Micron Technology, Inc., reserves the right to change products or specifications without notice. 53 512Mb: x4, x8, x16 DDR SDRAM Operations ...
Page 54
... V the V specified range. 2. Although not required by the Micron device, JEDEC specifies issuing another LMR command ( prior to activating any bank. If another LMR command is issued, the same, previ- ously issued operating parameters must be used. 3. The two AUTO REFRESH commands at Td0 and Te0 may be applied following the LMR com- mand at Ta0 ...
Page 55
... Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Operations Burst Length Reserved Reserved Reserved Reserved Reserved CAS Latency Reserved Reserved 2 3 (-5B only) ...
Page 56
... A0 – 0-1-2-3-4-5-6 1-2-3-4-5-6-7 2-3-4-5-6-7-0 3-4-5-6-7-0-1 4-5-6-7-0-1-2 5-6-7-0-1-2-3 6-7-0-1-2-3-4 7-0-1-2-3-4-5-6 56 512Mb: x4, x8, x16 DDR SDRAM Type = Interleaved – 0-1 1-0 – 0-1-2-3 1-0-3-2 2-3-0-1 3-2-1-0 – 0-1-2-3-4-5-6-7 1-0-3-2-5-4-7-6 2-3-0-1-6-7-4-5 3-2-1-0-7-6-5-4 4-5-6-7-0-1-2-3 5-4-7-6-1-0-3-2 6-7-4-5-2-3-0-1 7-6-5-4-3-2-1-0 Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Operations ...
Page 57
... READ NOP NOP READ NOP NOP Transitioning Data Micron Technology, Inc., reserves the right to change products or specifications without notice. 57 512Mb: x4, x8, x16 DDR SDRAM Operations T2n T3 T3n NOP T2n T3 T3n NOP T3 T3n NOP Don’t Care ...
Page 58
... A0–A6 set to the desired values. A DLL reset is initiated by issuing an LMR command with bits A7 and A9–An each set to zero, bit A8 set to one, and bits A0–A6 set to the desired values. Although not required by the Micron device, JEDEC specifications recommend that an LMR command resetting the DLL should always be followed by an LMR command selecting normal operating mode. All other combinations of values for A7– ...
Page 59
... E0 0 Enable 1 Disable 2 Drive Strength E1 0 Normal 1 Reduced E1, E0 Operating Mode Valid Reserved – Reserved t RCD (MIN) should be divided by Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Operations t RRD; the t RC. ...
Page 60
... DDR_x4x8x16_Core2.fm - 512Mb DDR: Rev. N; Core DDR Rev RCD ( RRD) MIN When 2 < NOP ACT Row Bank y t RRD t Micron Technology, Inc., reserves the right to change products or specifications without notice. 60 512Mb: x4, x8, x16 DDR SDRAM ≤ 3 RCD ( RRD) MIN NOP NOP RD/WR ...
Page 61
... PDF: 09005aef80a1d9d4/Source: 09005aef82a95a3a DDR_x4x8x16_Core2.fm - 512Mb DDR: Rev. N; Core DDR Rev. B 2/09 EN 512Mb: x4, x8, x16 DDR SDRAM t DQSS (NOM) case is shown; the t DQSS [MIN] and Micron Technology, Inc., reserves the right to change products or specifications without notice. 61 Operations t DQSS [MAX] are t RAS ©2000 Micron Technology, Inc. All rights reserved. ...
Page 62
... NOP NOP NOP AC, DQSCK, and DQSQ. Micron Technology, Inc., reserves the right to change products or specifications without notice. 62 512Mb: x4, x8, x16 DDR SDRAM Operations T3n T4 T5 NOP NOP T3n T4 T5 NOP NOP T3n T4 T4n T5 NOP ...
Page 63
... NOP READ NOP Bank, Col AC, DQSCK, and DQSQ. Micron Technology, Inc., reserves the right to change products or specifications without notice. 63 512Mb: x4, x8, x16 DDR SDRAM Operations T3n T4 T4n T5 T5n NOP NOP DO b T3n T4 T4n T5 T5n NOP ...
Page 64
... NOP NOP READ Bank, Col AC, DQSCK, and Micron Technology, Inc., reserves the right to change products or specifications without notice. 64 512Mb: x4, x8, x16 DDR SDRAM T3n T4 T5 T5n NOP NOP DO b T3n T4 T5 T5n NOP NOP DO ...
Page 65
... READ READ READ Bank, Bank, Bank, Col x Col b Col AC, DQSCK, and DQSQ. Micron Technology, Inc., reserves the right to change products or specifications without notice. 65 512Mb: x4, x8, x16 DDR SDRAM Operations T4 T4n T5 T5n NOP NOP ...
Page 66
... BST 1 NOP NOP AC, DQSCK, and DQSQ. Micron Technology, Inc., reserves the right to change products or specifications without notice. 66 512Mb: x4, x8, x16 DDR SDRAM Operations T4 T5 NOP NOP T4 T5 NOP NOP T3n T4 T5 NOP NOP Transitioning Data Don’ ...
Page 67
... BST NOP NOP AC, DQSCK, and DQSQ. Micron Technology, Inc., reserves the right to change products or specifications without notice. 67 512Mb: x4, x8, x16 DDR SDRAM Operations T4 T4n T5 T5n NOP NOP DI b T3n T4 T5 T5n WRITE NOP Bank, ...
Page 68
... RAS (MIN) is met, a READ command with auto precharge enabled would cause AC, DQSCK, and DQSQ. t RAS (MIN) is met. Micron Technology, Inc., reserves the right to change products or specifications without notice. 68 512Mb: x4, x8, x16 DDR SDRAM Operations T3n T4 T5 NOP ACT Bank a, ...
Page 69
... Bank RCD t RAS RPRE t LZ (MIN (MIN) Micron Technology, Inc., reserves the right to change products or specifications without notice. 69 512Mb: x4, x8, x16 DDR SDRAM T5 T5n T6 T6n PRE NOP NOP All banks One bank 5 ...
Page 70
... Data Data valid valid valid window window window t DQSQ window. DQS transitions at T2 and Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Operations DQSQ T3n T3n T3n ...
Page 71
... T3n T2n T3 T3n T2n T3 T3n Data valid Data valid Data valid window window window t DQSQ window. LDQS defines the lower DQSQ. Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Operations ...
Page 72
... T3 T3n (MAX (MAX) t DQSQ window time); if auto precharge is not Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Operations T5n (MAX) t RPST T5n T5n T5n t DQSS for BL ...
Page 73
... DDR_x4x8x16_Core2.fm - 512Mb DDR: Rev. N; Core DDR Rev. B 2/09 EN 512Mb: x4, x8, x16 DDR SDRAM t WTR should be met, as shown in Figure period are written to the internal array; any subsequent data-in Micron Technology, Inc., reserves the right to change products or specifications without notice. 73 Operations t WTR period are written t ...
Page 74
... DM t DQSS DQS DQSS DQS Transitioning Data 74 512Mb: x4, x8, x16 DDR SDRAM T2 T2n T3 NOP NOP Don’t Care Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Operations ...
Page 75
... WRITE Bank, Col n t DQSS 512Mb: x4, x8, x16 DDR SDRAM T3 T3n T4 T4n T5 NOP NOP NOP DI n Transitioning Data Don’t Care Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Operations ...
Page 76
... Col a Col Transitioning Data Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Operations T4n T5 T5n NOP Don’t Care T5 T5n NOP Don’t Care ...
Page 77
... T4 T5 READ NOP Bank a, Col Transitioning Data t WTR is not required, and the READ Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Operations T6 T6n NOP Don’t Care ...
Page 78
... DDR SDRAM T3n T4 T5 T5n NOP NOP Transitioning Data Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Operations T6 T6n NOP Don’t Care ...
Page 79
... DDR SDRAM T5n T3n T4 T5 NOP NOP Transitioning Data Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Operations T6 T6n NOP Don’t Care ...
Page 80
... DDR SDRAM T4 T5 PRE NOP Bank all) Transitioning Data not required, and Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Operations T6 NOP Don’t Care ...
Page 81
... 512Mb: x4, x8, x16 DDR SDRAM T3n T4 T4n T5 NOP PRE t RP Bank all) Transitioning Data Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Operations T6 NOP Don’t Care ...
Page 82
... 512Mb: x4, x8, x16 DDR SDRAM T3n T4 T4n T5 PRE NOP t RP Bank all) Transitioning Data Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Operations T6 NOP Don’t Care ...
Page 83
... Bank x t RCD t RAS t DQSS (NOM WPRES WPRE Micron Technology, Inc., reserves the right to change products or specifications without notice. 83 512Mb: x4, x8, x16 DDR SDRAM T4n T5 T5n T6 T7 NOP 1 NOP 1 NOP DQSL DQSH WPST Transitioning Data © ...
Page 84
... NOP NOP NOP DQSL t DQSH t WPST Transitioning Data Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Operations T8 1 PRE All banks One bank 4 Bank Don’t Care ...
Page 85
... WPRE t DQSL t DQSH Transitioning Data t DQSS (MIN). t DQSS (MAX). Micron Technology, Inc., reserves the right to change products or specifications without notice. 85 512Mb: x4, x8, x16 DDR SDRAM Operations T2n T3 t DSS 3 t WPST Don’t Care t RP) after the t RAS (MIN), as described for t RP) is completed ...
Page 86
... Bank x t RCD, t RAP RAS RPRE t LZ (MIN (MIN) t RAS has been satisfied. Micron Technology, Inc., reserves the right to change products or specifications without notice. 86 512Mb: x4, x8, x16 DDR SDRAM T5 T5n T6 T6n NOP NOP ...
Page 87
... NOP NOP NOP DQSL t DQSH t WPST Transitioning Data t REFI (MAX). t Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Operations T8 1 NOP t RP Don’t Care REFI; Micron t AC between ...
Page 88
... RP t RFC voltage is also required for the full duration of SELF REF Micron Technology, Inc., reserves the right to change products or specifications without notice. 88 512Mb: x4, x8, x16 DDR SDRAM Operations t RFC later. Ta1 Tb0 Tb1 Tb2 ( ( ) ) ( ...
Page 89
... REFI interval while Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000 Micron Technology, Inc. All rights reserved. Operations Tc1 ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ...
Page 90
... NOP or DESELECT command). A valid executable command may be applied one clock cycle later. PDF: 09005aef80a1d9d4/Source: 09005aef82a95a3a DDR_x4x8x16_Core2.fm - 512Mb DDR: Rev. N; Core DDR Rev. B 2/09 EN 512Mb: x4, x8, x16 DDR SDRAM t t REFC or REFC ). AT Micron Technology, Inc., reserves the right to change products or specifications without notice. 90 Operations ©2000 Micron Technology, Inc. All rights reserved. ...
Page 91
... Customer Comment Line: 800-932-4992 Micron and the Micron logo are trademarks of Micron Technology, Inc.All other trademarks are the property of their respective owners. This data sheet contains minimum and maximum limits specified over the power supply and temperature range set forth herein. Although considered final, these specifications are subject to change, as further product development and data characterization sometimes occur ...