ACPM-7886-BLK AVAGO [AVAGO TECHNOLOGIES LIMITED], ACPM-7886-BLK Datasheet - Page 9

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ACPM-7886-BLK

Manufacturer Part Number
ACPM-7886-BLK
Description
TD-SCDMA Power Amplifier
Manufacturer
AVAGO [AVAGO TECHNOLOGIES LIMITED]
Datasheet
iii. Ramp 2
The time in this zone should be kept below 35 seconds
to reduce the risk of flux exhaustion. The ramp up rate
should be 2°C/sec from 150°C to re-flow at 217°C. It is
important that the flux medium retains its activity
during this phase to ensure the complete coalescence
of the solder particles during re-flow.
iv. Reflow
The peak reflow temperature is calculated by adding
~32°C to the melting point of the alloy. Lead free solder
paste melts at 218°C and peak reflow temperature is
218°C + 32°C = 250°C (±5°C). Note that total time over
218°C is critical and should typically be 60 – 150
seconds. This period determines the appearance of the
solder joints. Excessive time above reflow may cause a
dull finish and charred of flux residues. Insufficient
time above reflow may lead to poor wetting and
improperly fused (cloudy) flux residues.
v. Cooling
Maximum slope for cooling is limited to 3°C/sec. More
rapid cooling may cause solder joints crack while
cooling at a slower rate will increase the likelihood of
a crystalline appearance on the solder joints (dull
finish).
PCB Design Guidelines
The recommended ACPM-7886 PCB land pattern is
shown in Figure 3. The substrate is coated with solder
mask between the I/O and conductive paddle to
protect the gold pads from short circuit that is caused
by solder bleeding / bridging.
Stencil Design Guidelines
A properly designed solder screen or stencil is required
to ensure optimum amount of solder paste is deposited
onto the PCB pads. The recommended stencil layout is
shown in Figure 4. The stencil has a solder paste
deposition opening that is approximately 80% of the
PCB pad. Reducing the stencil opening can potentially
generate more voids. On the other hand, stencil
openings larger than 100% will lead to excessive solder
paste smear or bridging across the I/O pads or
conductive paddle to adjacent I/O pads. Considering
the fact that solder paste thickness will directly affect
the quality of the solder joint, a good choice is to use
laser cut stencil composed of 0.100mm (4 mils) or
0.127mm (5 mils) thick stainless steel which is capable
of producing the required fine stencil outline. The
combined PCB and stencil layout is shown in Figure 5.
9
Figure 3. PCB land pattern (dimensions in mm)
Figure 4. Stencil outline drawing (dimensions in mm)
Figure 5. Combined PCB and stencil layouts (dimensions in mm)
0.44
0.55
0.64
1.68
0.375
1.68
2.1
2.1
0.64
0.375
0.55
0.44
Stencil
Opening

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