EM65101AF EMC [ELAN Microelectronics Corp], EM65101AF Datasheet - Page 67

• Manufacturer Part Number: EM65101AF
• Description: 128COM/160SEG 16 Gray Scale Level LCD Driver
• Manufacturer: EMC [ELAN Microelectronics Corp]

Product Specification (V0.4) 08.15.2005
(This specification is subject to change without further notice)
8.2.25 EEPROM Address Select Register
(At the time of reset: {NIB1, NIB0} = 0H, read address: 5H)
The NIB register selects whether to access the low nibble or high nibble data of
EEPROM.
8.2.26 Scroll Top Address
(At the time of reset: {STA3, STA2, STA1, STA0} = 0H, read address: 6H)
(At the time of reset: {STA6, STA5, STA4} = 0H, read address: 7H)
Set the top address of scroll data area in RAM. 0 <= Scroll top address <= 127; Scroll
top address must be less than the Scroll bottom address
D7
D7
D7
*
*
STA6
0
0
0
= Don’t Care
= Don’t Care
0
0
1
1
:
:
D6
D6
D6
1
1
1
NIB1
When settings CV5~CV0, you must set CV5~CV4 (upper nibble registers) first,
then set CV3~CV0 (lower nibble registers), and then start program execution.
The programming sequence of CV5~CV4 and CV3~CV0 has no restriction.
When reading from CV5~CV0, you must read EEPROM data to CV5~CV4
(upper nibble registers) first, then read EEPROM data to CV3~CV 0(lower
nibble registers).
STA5
0
0
D5
D5
D5
0
1
1
0
0
1
1
:
:
D4
D4
D4
1
0
1
STA4
NIB0
0
1
STA3 STA2 STA1 STA0
0
0
0
1
:
:
D3
D3
D3
*
*
STA6 STA5 STA4
D2
D2
D2
*
STA3
0
0
0
1
:
:
NIB1 NIB0
128COM/160SEG 16 Gray Scale Level LCD Driver
D1
D1
D1
Bank 2[1H] (CV3~CV0)
Bank 2[2H] (CV5~CV4)
EEPROM Address
STA2
D0
D0
D0
0
0
0
1
:
:
NOTE
STA1
CSB RS RDB WRB RE2 RE1 RE0
CSB RS RDB WRB RE2 RE1 RE0
CSB RS RDB WRB RE2 RE1 RE0
0
0
0
0
1
1
0
:
:
1
1
1
STA0
0
1
1
1
:
:
1
1
1
0
Top Common Line
0
0
COM127
COM99
0
0
COM0
COM1
0
EM65101
:
:
1
1
1
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0
0
0