AX88655P ASIX [ASIX Electronics Corporation], AX88655P Datasheet - Page 12

• Manufacturer Part Number: AX88655P
• Description: 5-Port 10/100/1000BASE-T Ethernet Switch
• Manufacturer: ASIX [ASIX Electronics Corporation]

3.0 Functional Description
3.1 Introduction
In general, the AX88655 device is a highly integrated Layer 2 switch. It supports five 10/100/1000 ports with on-chip
MACs. It also supports integrated switching logic, packet queuing memory and packet storage memory. The AX88655
is capable of routing-and-forwarding packets at wire speed on all ports regardless of packet size.
It is a low cost solution for five ports Gigabit Ethernet backbone switch design. No CPU interface is required; After power
on reset, AX88655 provide an auto load configuration setting function through a 2 wire serial EEPROM interface to
access external EEPROM device, and AX88655 can easily be configured to support trunking, QoS, IEEE 802.3x flow
control threshold setting, broadcast storm control ...etc functions. An overview of AX88658’s major functional blocks is
shown in Fig-1.
3.2 Packet Filtering and Forwarding Process
The switch use simple store-and-forward algorithm as packet switching method. After receives incoming packets, the
packets will be stored to the embedded memory first. The AX88655 searches in the Address-Lookup Table with DA of
the packet. The packet will be forward to its destination port, if this packet’s DA hits; otherwise this packet will be
broadcasted. Of course, only good packets will be forward. Conditions of good packets are below:
3.3 MAC Address Routing, Learning and Aging Process
The switch supports 4K MAC entries for switching. Two-way dynamic address learning is performed by each good
unicast packet is completely received. And linear/XOR hash algorithm of the static address learning is achieved by
EEPROM configuration. On the other hand, the routing process is performed whenever the packet’s DA is captured. If
the DA can not get a hit result, the packet is going to broadcast.
Only the learned address entries are scheduled in the aging machine. If one station does not transmit any packet for a
period of time, the belonging MAC address will be kicked out from the address table. The aging out time can be program
automatically through the EEPROM configuration. (Default value is 300 seconds)
3.4 Full Duplex 802.3x Flow Control
In full duplex mode, AX88655 supports the standard flow control mechanism defined in IEEE 802.3x standard. It
enables the stopping of remote node transmissions via a PAUSE frame information interaction. When space of the packet
buffer is less than the initialization setting threshold value, AX88655 will send out a PAUSE-ON packet with pause time
equal to “xFFF” to stop the remote node transmission. And then AX88655 will send out a PAUSE-OFF packet with
pause time equal to zero to inform the remote node to retransmit packet if has enough space to receive packets.
3.5 Half Duplex Back Pressure Control
In half duplex mode, AX88655 provide a backpressure control mechanism to avoid dropping packets during network
conjection situation. When space of the packet buffer is less than the initialization setting threshold value, AX88655 will
send a JAM pattern in the input port when it senses an incoming packet, thus force a collision to make the remote node
transmission back off and will effectively avoid dropping packets. And then AX88655 will not send out a JAM packet
any more if has enough space to receive one packet.
3.6 MII Polling
The AX88655 supports PHY management through the serial MDIO/MDC interface. That is, the AX88655 access related
1.
2.
3.
4.
5.
CRC is correct.
64 Bytes < PacketLength < 1518/1522 Bytes
Not local packets, That is, it is a local packets if its SourcePort is its DestinationPort.
Not PAUSE or other control packets.
Not the same trunking group.
AX88655 P 5-Port 10/100/1000BASE-T Ethernet Switch
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ASIX ELECTRONICS CORPORATION