AX88172A ASIX [ASIX Electronics Corporation], AX88172A Datasheet - Page 16

• Manufacturer Part Number: AX88172A
• Description: USB 2.0 to 10/100M Fast Ethernet Controller
• Manufacturer: ASIX [ASIX Electronics Corporation]

2.2 AX88172A 80-pin Pinout Description
GND18A
DP
DM
VBUS
XTL12P
XTL12N
RREF
EECK
EECS
EEDIO
XTL25P
XTL25N
RXIP
RXIN
TXOP
TXON
RSET_BG
LINK_LED
FDX_LED
SPEED_LED
RESET_N
EXTWAKEUP_N
GPIO_2 / RXER B5/PD
Pin Name
I5/PD/S
I5/PU/S
I5/PU/S
B5/PD/
B5/PD/
B5/PU/
Type
O18
AB
AB
AB
AB
AB
AB
AO
I18
O3
O5
O5
O5
AI
I3
P
T
T
T
Table 2
Pin No
73
72
58
67
68
71
45
46
47
78
79
26
24
25
52
30
34
4
5
7
8
1
9, 64
USB 2.0 data positive pin.
USB 2.0 data negative pin.
VBUS pin input. Please connect to USB bus power.
12Mhz ±0.003%crystal or oscillator clock input. This clock is needed for
USB PHY transceiver to operate.
12Mhz crystal or oscillator clock output.
For USB PHY’s internal biasing. Please connect to analog GND through a
resistor (12.1Kohm ±1%).
EEPROM Clock. EECK is an output clock to EEPROM to provide timing
reference for the transfer of EECS, and EEDIO signals. EECK only drive
high / low when access EEPROM otherwise keep at tri-state and internal
pull-down.
EEPROM Chip Select. EECS is asserted high synchronously with respect
to rising edge of EECK as chip select signal. EECS only drive high / low
when access EEPROM otherwise keep at tri-state and internal pull-down.
EEPROM Data In. EEDIO is the serial output data to EEPROM’s data
input pin and is synchronous with respect to the rising edge of EECK.
EEDIO only drive high / low when access EEPROM otherwise keep at
tri-state and internal pull-up.
25Mhz ± 0.005% crystal or oscillator clock input. This clock is needed for
the embedded 10/100M Ethernet PHY to operate.
25Mhz crystal or oscillator clock output.
Receive data input positive pin for both 10BASE-T and 100BASE-TX.
Receive data input negative pin for both 10BASE-T and 100BASE-TX.
Transmit data output positive pin for both 10BASE-T and 100 BASE-TX
Transmit data output negative pin for both 10BASE-T and 100 BASE-TX
For Ethernet PHY’s internal biasing. Please connect to GND through a
12.1Kohm ±1% resistor.
Link status LED indicator. This pin drives low continuously when the
Ethernet link is up and drives low and high in turn (blinking) when
Ethernet PHY is in receiving or transmitting state.
Full Duplex and collision detected LED indicator. This pin drives low
when the Ethernet PHY is in full-duplex mode and drives high when in
half duplex mode. When in half duplex mode and the Ethernet PHY
detects collision, it will be driven low (or blinking).
Ethernet speed LED indicator. This pin drives low when the Ethernet PHY
is in 100BASE-TX mode and drives high when in 10BASE-T mode.
Chip Reset Input. RESET_N pin is active low. When asserted, it puts the
entire chip into reset state immediately. After completing reset, EEPROM
data will be loaded automatically.
Remote-wakeup trigger from external pin. EXTWAKEUP_N should be
asserted low for more than 2 cycles of 12MHz clock to be effective.
General Purpose Input/ Output Pin 2. This pin is GPIO_2 in MAC mode,
but it will be redefined as RXER (receive error) or GPIO_2 depending on
EEPROM Flag [3]
: AX88172A 80-pin Pinout Description
Serial EEPROM Interface
Ethernet PHY Interface
Analog Ground for Ethernet PHY and 25Mhz crystal oscillator.
USB 2.0 to 10/100M Fast Ethernet Controller
USB Interface
Misc. Pins
16
in PHY mode.
Pin Description
ASIX ELECTRONICS CORPORATION
AX88772A/AX88172A
Low-pin-count