HD66421TB0 HITACHI [Hitachi Semiconductor], HD66421TB0 Datasheet
HD66421TB0
Related parts for HD66421TB0
HD66421TB0 Summary of contents
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... An 80-system MPU interface • Power supply voltage for operation : 2.2V to 5.5V • Power supply voltage for LCD : 18 V max. Ordering Information Type No. Package HD66421TB0 TCP HCD66421BP Die with gold bump This function realize low power consumption because high voltage for driving LCD is not needed. ...
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Preliminary Pin Arrangement GND1 VLCD1 VCC1 V5O V4O V3O V2O V1O GREF IREFM IREFP VLCD2 VLCD3 VCC2 GND2 GND3 VCC3 OSC1 OSC2 OSC CO DCON CL1 FLM M M/S RES VCC4 GND4 DB0 DB1 DB2 DB3 ...
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Preliminary Pad Arrangement Chip size : 8.99 x 4.72 mm Coordinate : Pad center Origin : Chip Center Bump size : GND1, GND8, dummy A, dummy B Power, I/O (Pad No. 276 to 321) COM1 - 100, SEG1 - 160, ...
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Preliminary No. PAD NAME SEG34 -2372 -2082 92 SEG35 -2322 -2082 93 SEG36 -2272 -2082 94 SEG37 -2222 -2082 95 SEG38 -2172 -2082 96 SEG39 -2121 -2082 97 SEG40 -2071 -2082 98 SEG41 -2021 -2082 99 SEG42 ...
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Preliminary No. PAD NAME X Y 241 COM67 4217 79 242 COM68 4217 129 243 COM69 4217 179 244 COM70 4217 230 245 COM71 4217 280 246 COM72 4217 330 247 COM73 4217 380 248 COM74 4217 430 249 COM75 ...
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Preliminary Pin Description Number Pin Name of Pins I/O Connected to - Vcc1-6, GND1-6 12 VLCD1 V1O, V2O, V3O,V4O, V5O OSC 1 I, Oscillator OSC1,OSC2 2 I/O resister OSC of Slave DCON ...
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Preliminary Register List Index Reg. Bits ...
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Preliminary RMW RMW = 1: Read-modify-write mode; Address is incremented only after write access RMW = 0: Address is incremented after both write and read access DISP DISP = 1: Display on DISP = 0: Display off STBY STBY = ...
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Preliminary BLK BLK = 1: Blink function is used BLK = 0: Blink function is not used CM1, 0 CM1 (1,1): Alternative cycle is 13 lines. CM1 (1,0): Alternative cycle is 11lines. CM1 (0,1): ...
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Preliminary Block Diagram COM1 COM50 SEG1 Row Driver Level Shifter X Address Counter Y Address Counter Blink Registers Start Line Register Blink Start Line Register Blink End Line Register Control Register Contrast Control Register LCD driver power supply, MPU Interface ...
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Preliminary System Description The HD66421 can display a maximum of 160 x 100 dots (ten 16x16-dot characters x 6 lines) four-level gray scale or four colour LCD panel. Four levels of gray scale can be selected from 32-levels, so the ...
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Preliminary MPU Interface The HD66421 can interface directly to an MPU through an 8-bit data bus or through an I/O port (figure 2). The MPU can access the HD66421 internal registers independently of internal clock timing. The index register can ...
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Preliminary LCD Driver Configuration Row and column outputs: The HD66421's row outputs is only both sides. In any case, each output's function is fixed; COM1 to COM100 output row signals and SEG1 to SEG160 output column signals. Row outputs from ...
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Preliminary Column Address Inversion According to LCD Driver Layout: The HD66421 can always display data in address H'0 on the top left of an LCD panel regardless of where it is positioned with respect to the panel. This is because ...
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Preliminary Multi-LSI Operation Using multiple HD66421s provides the means for extending the number of display dots. Note the following items when using the multi-LSI operation. (1) The master LSI and the slave LSI must be determined; the M/S pin of ...
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Preliminary Display RAM Configuration and Display The HD66421 incorporates a bit-mapped display RAM. It has 320 bits in the X direction and 100 bits in the Y direction. The 320 bits are divided into forty 8-bit groups. As shown in ...
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Preliminary ...
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Preliminary Word Length The HD66421 can handle either 8- or 6-bits as a word. In the display memory, one X address is assigned to each word 6-bits long in X direction. LCD drive signal output SEG1 H'00 ...
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Preliminary Monochrome Display Mode The HD66421 can control monochrome display. This mode is set when MON is set to 1. Two plane of display can be selected in this mode using two bits data for gray scale. One plane can ...
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Preliminary Configuration of Display Data Bit Packed Pixel Method For grey scale display and super reflective colour display, multiple bits are needed for one pixel. In the HD66421, two bits are assigned to one pixel, enabling a four-level grey scale ...
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Preliminary Table 4 Value of a Palette Register and Grayscale Levels (GRAY= 0) Value ...
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Preliminary Access to Internal Registers and Display RAM Access to Internal Registers by the MPU: The internal registers includes the index register and data registers. The index register can be accessed by driving both the CS and RS signals low. ...
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Preliminary Display RAM Reading by LCD Controller: Data is read by the HD66421 to be displayed asynchronously with accesses by the MPU. However, because simultaneous access could damaging data in the display RAM, the HD66421 internally arbitrates access timing; access ...
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Preliminary Read-Modify-Write: X- incremented after reading form or writing data to the display RAM at normal mode. However Y-address is not incremented after reading data from the display RAM at read-modify-write mode. The data which is read from ...
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Preliminary Arbitration Control The HD66421 controls the arbitration between draw access and display access. The draw access read and write display memory incorporated in the HD66421. The display access outputs display data to the liquid crystal panel. The draw access ...
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Preliminary Vertical Scroll Function The HD66421 can vertically scroll a display by varying the top raster to be displayed. which is specified by the display start raster register. Figure 22 and 23 show vertical scroll examples. As shown, when the ...
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Preliminary Y-address H'00 H'01 H'02 H'03 H'04 Top raster to be H'05 displayed = 0 H'06 H'07 H'08 H'09 H'0A H'4C H'4D H'4E H'4F Y-address H'01 H'02 H'03 H'04 Top raster to be H'05 displayed = 1 H'06 H'07 H'08 ...
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Preliminary Partial Display Function The HD66421 can display only a part of a full display. The duty ratio of this partial display is 1/8 and rest of display is scanned with unselected levels. The position of this partial display can ...
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Preliminary Blink Function The HD66421 can blink a specified area on the dot-matrix display. Blinking is achieved by repeatedly turning on and off the specified area at a frequency of one sixty-fourth the frame frequency. For example, frequency is 80 ...
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Preliminary Power Down Modes The HD66421 has a standby function providing low power-dissipation, which is initiated by internal register settings. During standby mode, all the HD66421 functions are inactive and data in the display RAM and internal registers except the ...
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Preliminary Power On/Off Procedure Figure 29 shows the procedure for turning the power supply on and off. This procedure must be Turn on power (power-on reset) Set PWR,AMP bit to 1 (control register 1) Set CNF, ADC, DTY1, DTY0, INC ...
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Preliminary Oscillator The HD66421 incorporates two sets of R-C oscillator for two display modes: OSC-OSC1 oscillator is used for 32-levels gray scale display mode and OSC-OSC2 oscillator for 4-levels gray scale display mode. If the internal oscillator is not used, ...
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Preliminary Power Supply Circuits HD66421 has following circuits for power supply circuit: operational amplifiers, resistive dividers, bias control circuit and contrast control circuit. LCD driving voltage, VLCD, must be generated externally. LCD Drive Voltage Power Supply Levels: To drive the ...
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Preliminary LCD drive levels bias ratio: LCD driving levels bias ratio can be selected from 1/8, 1/9, 1/10 or 1/11. Power Supply: The HD66421 needs the external power supply for LCD driving circuit. If this power circuit has on/off control, ...
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Preliminary Reset The low RES signal initializes the HD66421, clearing all the bits in the internal registers. During reset. the internal registers cannot be accessed. Note that if the reset conditions specified in the Electric Characteristics section are not satisfied, ...
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Preliminary Internal Registers The HD66421 has one index register and 18 data registers, all of which asynchronously with the internal clock. All the registers except the display memory access register are write-only. Accessing unused bits or addresses affects nothing; unused ...
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Preliminary Control Register 2 (R1): Control register 2 (figure 34) controls general operations of the HD66421. Each bit has its own function as described below. BIS1, BIS0 bits BIS1 (1, 1): 1/8 LCD drive levels bias ratio BIS1, ...
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Preliminary Display Memory Access Register (R4): The display memory access register (figure 37) is used to access the display RAM. If this register is write-accessed, data is directly written to the display RAM. If this register is read-accessed, data is ...
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Preliminary Blink Registers (R8 to R10): The blink bit registers (figure 41) designate the 8-bit groups to be blinked. Setting a bit to 1 blinks the correspond- ing 8-bit group. Any number of groups can be blinked; setting all the ...
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Preliminary Contrast Control and LCD Alternative Drive Cycle Register (R16): The contrast control register (figure 44) designates the contrast level of LCD display. These bits change the voltage which is supplied to LCD drivers. Table 9 Grayscale Levels GP14 GP13 ...
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Preliminary Figure 45 shows characteristics of the LCD effective value against grayscale. This value is almost linear at all grayscale range without LCD panel. This linearity will be lost if LCD panel is connected. In this case, the four appropriate ...
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Preliminary Plane Selection Register (R17): The plane selection register (figure 46) controls general operations of the HD66421. Each bit has its own function as described below. MON bit MON = l: Monochrome display MON = 0: 4-level gray scale display ...
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Preliminary Absolute Maximum Ratings Item Power supply Logic circuit voltage LCD drive circuit Input voltage 1 Input voltage 2 Operating temperature Storage temperature Notes: 1 .Measured relative to GND 2 Applies to pins M/S, OSC, OSC1, OSC2, DB7 to DB0, ...
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Preliminary Electrical Characteristics DC Characteristics (Vcc=2.2 to 5.5V, GND=0V, VLCD=6 to 18V, Ta=-40 to +85°C Note 9) Applicable Item Symbol Pins I/O leakage IIOL current V-pins leakage IVL current Driver on SEG1 to SEG160 Ron COM1 to COM100 resistance Input ...
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Preliminary Input Terminal Pins: CS, RS, WR, RD, RES, M/S Pins: DB7 to DB0, FLM, M, CL1 I/O Terminal Input Enable Figure 47 Terminal Configuration Output Terminal Pins Rev. 1.1E '99.02.10 HD66421 M/S CO data Output Enable Data ...
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Preliminary AC Characteristics (Vcc = 2.2 to 5.5V, GND = 0V -40 to +85°C Clock Characteristics Item Oscillation frequency External clock frequency External clock duty cycle External clock fall time External clock rise time MPU Interface Item RD ...