EM78P468NBQ EMC [ELAN Microelectronics Corp], EM78P468NBQ Datasheet - Page 44

• Manufacturer Part Number: EM78P468NBQ
• Description: 8-BIT Microcontroller
• Manufacturer: EMC [ELAN Microelectronics Corp]

EM78P468N
8-BIT Microcontroller
40 •
4.9 LCD Driver
R9/LCDCR (LCD Control Register)
Table 3 Interrupt Vector
This LSI can drive LCD of up to 32 segments and 4 commons t
4*32 dots. LCD blo
comm
mo
number of common and frame frequency are determined by the LCD controller register.
The basic structure contains a timing
pr
regi
1/3, 1/4), and LCD frame frequency co
RAM address contro
circuit can change operation frequency to improve VLCD2 and VL
The control register is explained as follows.
Bit 7 (B
Bit 6 ~ 5 (DS1 ~ DS0): LCD dut
oper tim
Bit 7
de, green
ster for L
BS
Interrupt V
DS1
on ou
Interrupt Source
0
0
1
S): LCD bi
000CH
000FH
ENI/ DIS
0003H
0006H
0009H
0012H
0015H
0018H
ing
tput pins, and LCD operating power supply pins. This
CD d
Bit 6
DS1
mode
for di
ec
I
river whi
tor
as select bit, 0/1=>(1/2 bia
ffere
ck
an
l register. The register RB is an LCD RAM data buffer. LCD booster
DS0
d idle mode. Th
is made p of LCD driver, display RAM, egment
Bit 5
DS0
X
nt duty
0
1
TCC overflow interrupt.
External interrupt P5.4/INT0 pin
External interrupt P5.5/INT1 pin
Counter 1 underflow interrupt
Cou
High-pulse width timer underflow interrupt
Low-pulse width timer underflow interrupt
PORT , PORT 8 input status change wake-up
ch incl
Fi
g. 15. Interrupt Backup Diagram
nter 2
y s
6
and
u
ude
LCDEN
Bit 4
elect
und
LCD Duty
s L
(This specification is subject to change without further notice)
control that uses a subsystem clock to generate the
displa
1/2 duty
1/3 duty
1/4 duty
ntr
e LCD d y; bias;
CD en
erflow
ol. T
Interrup
y ac
ACC
R3
Bit 3
he registe
s) / (1/3 bias)
able/disabl
interr
--
cesse
Product Specification (V1.2) 03.15.2005
ut
t S tus
upt
Interrupt Occ
s. Th
LCDTYPE
ta
r
Bit 2
RA is an LCD contrast and LCD
e, bias (1
RETI
e R9
the
numbe o
ur
regis
ha
cir
s
/2 and 1/3), duty (1/2,
LCDF1
CD3 drive capability.
cuit wor
STACKACC
t can dr
Bit 1
STACKR3
ter is a
r f segment; the
ks on norma
ive a tota
output p
co
LCDF0
Bit 0
mman
ins,
l of
d
l