ICX059 SONY [Sony Corporation], ICX059 Datasheet - Page 3

• Manufacturer Part Number: ICX059
• Description: 1/3-inch CCD Image Sensor for PAL Color Camera
• Manufacturer: SONY [Sony Corporation]

Bias Conditions
DC Characteristics
1
2
3
4
Output amplifier drain voltage
Output amplifier gate voltage
Output amplifier source
Substrate voltage adjustment range
Fluctuation range after substrate voltage adjustment
Reset gate clock voltage adjustment range
Fluctuation range after reset gate clock voltage
adjustment
Protective transistor bias
V
Optimal setting
V
Optimal setting
Output amplifier drain current
Input current
Input current
RGL
SUB
Indications of substrate voltage (V
The setting values of substrate voltage and reset gate clock voltage are indicated on the back of the image
sensor by a special code. Adjust substrate voltage (V
indicated voltage. Fluctuation range after adjustment is ±3%.
V
Current to SUB pin when 55V is applied to SUB pin, while pins that are not tested are grounded.
1) Current to each pin when 18V is applied to V
2) Current to each pin when 20V is applied sequentially to V
3) Current to each pin when 15V is applied sequentially to RG, LH
4) Current to V
L
code
code
setting is the V
are grounded.
not tested are grounded. However, 20V is applied to SUB pin.
that are not tested are grounded. However, 15V is applied to SUB pin.
to RG pin or when, 20V is applied to V
However, GND and SUB pins are left open.
<Example> “5L”
V
V
Code and optimal setting correspond to each other as follows.
SUB
RGL
Item
code
code
L
pin when 30V is applied to V
VL
1.0 1.5 2.0 2.5 3.0 3.5 4.0
9.0 9.5 10.0 10.5 11.0 11.5 12.0 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 16.5 17.0 17.5 18.0 18.5
E
1
voltage of the vertical transfer clock waveform.
one character indication
one character indication
Item
2
f
V
V
RGL
SUB
G
3
= 3.0V
= 12.0V
h
4
SUB
Symbol
I
I
I
DD
IN1
IN2
5
J
) · reset gate clock voltage (V
K
6
V
GG
RGL
L
7
Min.
1
, Vss, H
, V
DD
– 3 –
code V
m
, V
2
Symbol
V
V
V
V
∆V
V
∆V
V
, V
OUT
N
DD
GG
SS
SUB
RGL
L
Typ.
SUB
RGL
5
SUB
, Vss and SUB pins, while pins that are not tested
3
SUB
1
, V
, H
P
) and reset gate clock voltage (V
code
4
14.55
2
, V
1
Min.
Q
3.8
9.0
1.0
Max.
–3
–3
, V
and LH
10
1
DD
RGL
Grounded with
820Ω resistor
R
2
and V
, V
) setting value.
1
, H
15.0
Typ.
S
Unit
4.2
mA
3
µA
µA
1
2
and V
OUT
pins, while V
1
, H
T
pins or when, 24V is applied
Remarks
15.45
2
Max.
4.65
18.5
U
4.0
4
+3
+3
and V
pins, while pins that are
3
4
V
GG
L
Unit
W
pin is grounded.
%
%
V
V
V
V
pins, while pins
X
RGL
Remarks
±5%
1
1
ICX059AK
) to the
Y
6
Z