ICX055 SONY [Sony Corporation], ICX055 Datasheet - Page 3

• Manufacturer Part Number: ICX055
• Description: 1/3-inch CCD Image Sensor for PAL Color Camera
• Manufacturer: SONY [Sony Corporation]

Bias Conditions
DC Characteristics
Output amplifier drain voltage
Output amplifier gate voltage
Output amplifier source
Substrate voltage adjustment range
Fluctuation range after substrate voltage adjustment
Reset gate clock voltage adjustment range
Fluctuation range after reset gate clock voltage adjustment
Protective transistor bias
Output amplifier drain current
Input current
Input current
2
3
4
1
V
Optimal setting
V
Optimal setting
RGL
SUB
V
1) Current to each pin when 18V is applied to V
2) Current to each pin when 20V is applied sequentially to V
3) Current to each pin when 15V is applied sequentially to RG, H
4) Current to V
Current to SUB pin when 55V is applied to SUB pin, while pins that are not tested are grounded.
Indications of substrate voltage (V
The setting values of substrate voltage and reset gate clock voltage are indicated on the back of the image
sensor by a special code. Adjust substrate voltage (V
indicated voltage. Fluctuation range after adjustment is ±3%.
L
setting is the V
are grounded.
not tested are grounded. However, 20V is applied to SUB pin.
not tested are grounded. However, 15V is applied to SUB pin.
to RG pin or when, 20V is applied to V
GND and SUB pins are left open.
code
code
<Example> “5L”
V
V
Code and optimal setting correspond to each other as follows.
Item
SUB
RGL
code
code
L
pin when 30V is applied to V
VL
1.0 1.5 2.0 2.5 3.0 3.5 4.0
9.0 9.5 10.0 10.5 11.0 11.5 12.0 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 16.5 17.0 17.5 18.0
E
1
voltage of the vertical transfer clock waveform.
one character indication
one character indication
Item
2
f
V
V
RGL
SUB
G
3
Symbol
I
I
I
= 3.0V
= 12.0V
DD
IN1
IN2
4
h
SUB
J
5
) · reset gate clock voltage (V
Min.
K
6
GG
V
, Vss, H
L
7
RGL
1
, V
DD
Typ.
– 3 –
m
code V
3
, V
2
, V
OUT
N
1
Symbol
V
V
V
V
V
V
and H
, Vss and SUB pins, while pins that are not tested
3
SUB
Max.
, V
V
V
DD
GG
SS
SUB
RGL
L
SUB
10
P
SUB
RGL
1
) and reset gate clock voltage (V
4
code
, V
1
Q
, V
2
DD
pins, while V
14.55
Unit
mA
1.75
Min.
µA
µA
RGL
1
9.0
1.0
2
–3
–3
, H
R
and V
, V
Grounded with
680Ω resistor
) setting value.
2
3
S
Remarks
and V
and V
OUT
Typ.
15.0
3
4
2.0
2
T
pins or when, 24V is applied
L
GG
pin is grounded. However,
U
4
15.45
Max.
2.25
18.5
4.0
pins, while pins that are
pins, while pins that are
+3
+3
V
Unit
W
%
%
V
V
V
V
X
±5%
RGL
Remarks
1
1
ICX055AK
) to the
Y
18.5
Z