LC89057W-VF4A-E SANYO [Sanyo Semicon Device], LC89057W-VF4A-E Datasheet - Page 39
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LC89057W-VF4A-E
Manufacturer Part Number
LC89057W-VF4A-E
Description
Digital Audio Interface Transceiver
Manufacturer
SANYO [Sanyo Semicon Device]
Datasheet
1.LC89057W-VF4A-E.pdf
(59 pages)
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Manufacturer
Quantity
Price
Company:
Part Number:
LC89057W-VF4A-E
Manufacturer:
SANYO
Quantity:
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Part Number:
LC89057W-VF4A-E
Manufacturer:
SANYO/三洋
Quantity:
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•
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In case of setting with PBSEL at 1, terminal of EMPHA/UO/CO will be Channel status data output terminal CO and
The setting of AOSEL comes into effect in the case that the bit 1 output of channel status is selected with VOSEL. In
the setting for UOSEL is impossible. In case of setting with PBSEL at 0, the setting for EMPHA/UO/CO terminal
follows the setting for UOSEL.
the case that 1 is selected with AOSEL,
IEC61937, non-PCM synchronous signal is detected.
UOSEL
VOSEL
AOSEL
RXMON
FSLIM [1:0]
PBSEL [1:0]
CCB address: 0xE8; Command address: 1; Demodulation function: System setting
PBSEL1
DI15
DI7
0
PBSEL0
DI14
DI6
0
EMPHA/UO/CO pin setting (When PBSEL1 is set to 0.)
0: EMPHA emphasis output (initial value)
1: UO user data output
AUDIO/VO pin setting
0:
1: VO validity flag output
Output contents at the time of setting
0: only output channel status bit 1 (initial value)
1: output channel status bit 1, IEC61937 or DTS-CD/LD detection flag
Setting of digital data input status monitoring
0: Don't monitor data input status (initial value)
1: Monitor data input status
Setting of sampling frequency reception range for input digital data signal
00: No limit (initial value)
01: fs ≤ 96kHz
10: fs ≤ 48kHz
11: Reserved
__________
CKST/PB pin setting
00: signal output of switching transition term of
01: Preamble B synchronization signal output with PB, DIT function
10: Preamble B synchronization signal output with PB, DIR function
11: Reserved
____________
AUDIO channel status bit 1 output (initial value)
____________
FSLIM1
AUDIO
____________
DI13
DI5
0
LC89057W-VF4A-E
/
VO terminal output high level, when either channel status bit 1 or
FSLIM0
DI12
DI4
1
RXMON
DI11
DI3
0
AOSEL
AUDIO is set with
____________
DI10
DI2
0
VOSEL
CKST clock (initial value)
__________
CAU
DI1
DI9
AUDIO/VO pin
____________
UOSEL
CAL
DI0
DI8
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