BU7636MWV_11 ROHM [Rohm], BU7636MWV_11 Datasheet - Page 2
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BU7636MWV_11
Manufacturer Part Number
BU7636MWV_11
Description
Silicon Monolithic integrated circuit
Manufacturer
ROHM [Rohm]
Datasheet
1.BU7636MWV_11.pdf
(5 pages)
◇
(note) Input level of REC and Output level of PB are relative to AVDD. (note) V
< Current consumption > #MCLK=24MHz
Power-down mode
Rec mode
Play mode
Video mode
<MREG>
output voltage
<Logic interface>
L input voltage
H input voltage
Input current
L output voltage
H output voltage
<REC path (MICIN→ADOUT)> #ALC1=OFF, MIC GAIN 22dB (MGAIN=42dB, MLIM=-20dB)
Input impedance
Input level
L/R gain mismatch
Distortion
SNR
L/R separation
ALC1 output level
<PB path1 (DAIN→LINEOUT)> #LGAIN=+5dB
Output level
L/R gain mismatch
Distortion
SNR
L/R separation
<PB path2 (DAIN→EVROUT→SPIN→SPOUT BTL 出力)> #ALC2=OFF, EVR=-6dB, RL=8Ω
Output level
Distortion
SNR
ALC2 output level
< Video path (YIN→YOUT, VOUT)(CIN→COUT, VOUT)>
Voltage gain
Maximum output level
Frequency characteristic 1
Frequency characteristic 1
Differential gain
Differential phase
Y signal output S/N
S-DC
output voltage
Electrical characteristics
(Unless specified, Ta=25℃、AVDD=SPVDD=DVDD=VVDD=CPVDD= 3.3V、VVDD_SDC=5.0V、AVSS=SPVSS=DVSS=VVSS=
0V、B.W.=22Hz~22kHz、fs=48kHz、fin=1kHz)
Parameter
M
L
H
IDDS
IDDR
IDDP
IDDV
VOREG
VIL
IIL
VOL
ZIN
VIN
△GV
THD+N
SNR
SEPR
VO
△GV
THD+N
SNR
SEPR
VO
THD+N
SNR
VOALC
GV
VOM
GF1
GF2
DG
DP
V
V
V
VIH
VOH
DOALC
SNY
SDCL
SDCM
SDCH
Symbol
0.75AVDD-
DVDD-0.5
0.7DVDD
DVSS
MIN.
-1.0
-5.5
-1.0
+5.5
-3.0
-10
-26
+50
0.2
1.0
1.0
2.2
1.8
4.0
70
62
79
79
70
82
80
50
76
-
-
-
-
0
-
-
-
-
-
0.75AVDD 0.75AVDD+
Limits
TYP.
0.03
-4.0
+6.0
100
-24
100
100
-27
+65
REV. A
8.5
7.5
3.0
3.0
2.6
1.0
1.0
0.1
2.1
4.6
33
-
-
-
-
-
70
84
-6
80
90
60
83
0
0
0
0.3DVDD
DVDD
DVDD
MAX.
+1.0
-2.5
+1.0
+6.5
130
-22
-18
0.1
0.2
0.5
5.0
5.0
3.0
3.0
0.5
2.4
16
16
80
10
-
-
-
-
-
-
-
-
-
-
-
-
-
SDCM
dBFS
,V
dBV
dBV
dBV
dBV
Unit
mA
mA
mA
mA
μA
Vpp
kΩ
deg
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
V
V
V
V
V
V
V
V
%
SDCH
is relative to VVDD_SDC.
#PWAP=0
#MDREC=1
#MDPB=MDSP= 1
#PWVD=PWCP=1
2.2kΩ load
IOL=-1mA
IOL=1mA
DOUT=0dBFS
DOUT=0dBFS
DOUT=-6dBFS@1kHz
B.W.=JIS-A
DOUT=-6dBFS@1kHz
ALC1=ON
DIN=-6dBFS
DIN=-6dBFS
DIN=-6dBFS@1kHz
B.W.=JIS-A
DIN=-6dBFS@1kHz
DIN=0dBFS
DIN=0dBFS@1kHz
B.W.=JIS-A
ALC2=ON, EVR=8dB
VIN=100KHz, 1.0Vpp
f=10KHz, THD=1%
f=6MHz/100KHz
f=18MHz/100KHz
VIN=1.0Vpp
Standard stair step signal
VIN=1.0Vpp
Standard stair step signal
Band 100k~6MHz Terminal
impedance 150Ω
100% white video signal
RL=10kΩ+100kΩ
RL=10kΩ+100kΩ
RL=10kΩ+100kΩ
Condition
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