X24641S8-1.8 XICOR [Xicor Inc.], X24641S8-1.8 Datasheet - Page 7

• Manufacturer Part Number: X24641S8-1.8
• Description: 400 KHz 2-Wire Serial E 2 PROM
• Manufacturer: XICOR [Xicor Inc.]

X24641
Acknowledge Polling
The maximum write cycle time can be significantly
reduced using Acknowledge Polling. To initiate
Acknowledge Polling, the master issues a start condi-
tion followed by the Slave Address Byte for a write or
read operation. If the device is still busy with the
nonvolatile write cycle, then no ACK will be returned. If
the device has completed the nonvolatile write opera-
tion, an ACK will be returned and the host can then
proceed with the read or write operation. Refer to
figure 6.
Figure 6. Acknowledge Polling Sequence
BYTE LOAD COMPLETED
COMMAND SEQUENCE
(READ OR PROGRAM)
ENTER ACK POLLING
CYCLE COMPLETE.
READ OR PROGRAM
CONTINUE NORMAL
BY ISSUING STOP.
ADDRESS BYTE
NONVOLATILE
SEQUENCE?
ISSUE SLAVE
RETURNED?
CONTINUE
PROCEED
WRITE
ISSUE
START
ACK
YES
YES
NO
NO
ISSUE STOP
ISSUE STOP
7026 FM 09
7
Figure 7. Current Address Read Sequence
READ OPERATIONS
Read operations are initiated in the same manner as
write operations with the exception that the R/W bit of
the Slave Address Byte is set to one. There are three
basic read operations: Current Address Reads,
Random Reads, and Sequential Reads.
Current Address Read
Internally, the device contains an address counter that
maintains the address of the last byte read or written,
incremented by one. After a read operation from the
last address in the array, the counter will “roll over” to
the first address in the array. After a write operation to
the last address in a given page, the counter will “roll
over” to the first address of the same page.
Upon receipt of the Slave Address Byte with the R/W
bit set to one, the device issues an acknowledge and
then transmits the byte at the current address. The
master terminates the read operation when it does not
respond with an acknowledge during the ninth clock
and then issues a stop condition. Refer to figure 7 for
the
sequence.
It should be noted that the ninth clock cycle of the read
operation is not a “don’t care.” To terminate a read
operation, the master must either issue a stop condi-
tion during the ninth cycle or hold SDA HIGH during
the ninth clock cycle and then issue a stop condition.
SIGNALS
FROM THE
MASTER
SDA BUS
SIGNALS
FROM THE
SLAVE
address,
S
A
R
S
T
T
acknowledge,
1
0 1 0
ADDRESS
SLAVE
1
A
C
K
and
DATA
data
7026 FM 10
transfer
O
P
S
P
T