AX500-1BG896 ACTEL [Actel Corporation], AX500-1BG896 Datasheet - Page 49

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AX500-1BG896

Manufacturer Part Number
AX500-1BG896
Description
Axcelerator Family FPGAs
Manufacturer
ACTEL [Actel Corporation]
Datasheet
SSTL2
Stub Series Terminated Logic for 2.5V is a general-purpose 2.5V memory bus standard (JESD8-9). The Axcelerator
devices support both classes of this standard. This requires a differential amplifier input buffer and a push-pull output
buffer.
Class I
Table 2-43 • DC Input and Output Levels
AC Loadings
Figure 2-21 • AC Test Loads
Table 2-44 • AC Waveforms, Measuring Points, and Capacitive Loads
Timing Characteristics
Table 2-45 • 2.5V SSTL2 Class I I/O Module
* Measuring Point = V
Parameter
2.5V SSTL2 Class I I/O Module Timing
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
DP
PY
ICLKQ
OCLKQ
SUD
SUE
HD
HE
CPWHL
CPWLH
WASYN
REASYN
HASYN
CLR
PRESET
Min,V
-0.3
Input Low (V)
V
REF
-0.75
V
Worst-Case Commercial Conditions V
IL
V
Max,V
Input Buffer
Output Buffer
Clock-to-Q for the I/O input register
Clock-to-Q for the IO output register and the I/O
enable register
Data Input Set-Up
Enable Input Set-Up
Data Input Hold
Enable Input Hold
Clock Pulse Width High to Low
Clock Pulse Width Low to High
Asynchronous Pulse Width
Asynchronous Recovery Time
Asynchronous Removal Time
Asynchronous Clear-to-Q
Asynchronous Preset-to-Q
REF
-0.2
trip
Input High (V)
V
V
Min,V
REF
Description
REF
+0.2
+0.75
V
IH
Max,V
Test Point
CCA
3.6
Measuring Point* (V)
= 1.425V, V
v2.7
V
25
REF
V
Min.
CCI
0.43
0.45
0.43
Max,V
V
REF
'–2' Speed
V
TT
= 2.3V, T
50
-0.57
OL
30 pF
Max.
1.86
2.43
0.67
0.67
0.23
0.26
0.00
0.10
0.00
0.23
0.23
0.00
J
= 70°C
V
Min.
0.48
0.51
0.48
REF
V
'–1' Speed
REF
Min,V
V
1.25
(typ) (V)
+0.57
OH
Max.
2.12
2.76
0.77
0.77
0.27
0.30
0.00
0.00
0.10
0.00
0.27
0.27
Axcelerator Family FPGAs
Min.
0.57
0.60
0.57
'Std' Speed
mA
I
7.6
OL
C
Max.
load
2.50
3.25
0.90
0.90
0.31
0.35
0.00
0.00
0.10
0.00
0.31
0.31
30
(pF)
mA
-7.6
I
OH
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2-35

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