K7N161801A-QFCI25/20/16 SAMSUNG [Samsung semiconductor], K7N161801A-QFCI25/20/16 Datasheet - Page 14

• Manufacturer Part Number: K7N161801A-QFCI25/20/16
• Description: 512Kx36 & 1Mx18 Pipelined NtRAM
• Manufacturer: SAMSUNG [Samsung semiconductor]

SLEEP MODE
K7N163601A
K7N161801A
K
ZZ
Isupply
All inputs
(except ZZ)
Outputs
(Q)
SLEEP MODE is a low current, power-down mode in which the device is deselected and current is reduced to I
SLEEP MODE is dictated by the length of time the ZZ is in a High state.
After entering SLEEP MODE, all inputs except ZZ become disabled and all outputs go to High-Z
The ZZ pin is an asynchronous, active high input that causes the device to enter SLEEP MODE.
When the ZZ pin becomes a logic High, I
MODE is not guaranteed to successful complete. Therefore, SLEEP MODE (READ or WRITE) must not be initiated until valid pend-
ing operations are completed. similarly, when exiting SLEEP MODE during t
while the SRAM is transitioning out of SLEEP MODE.
SLEEP MODE ELECTRICAL CHARACTERISTICS
Current during SLEEP MODE
ZZ active to input ignored
ZZ inactive to input sampled
ZZ active to SLEEP current
ZZ inactive to exit SLEEP current
Deselect or Read Only
DESCRIPTION
ZZ setup cycle
t
ZZI
t
PDS
I
SB2
SB2
SLEEP MODE WAVEFORM
is guaranteed after the time t
512Kx36 & 1Mx18 Pipelined NtRAM
- 14 -
High-Z
CONDITIONS
ZZ
V
IH
ZZI
PUS
is met. Any operation pending when entering SLEEP
, only a DESELECT or READ cycle should be given
SYMBOL
t
I
t
t
PDS
PUS
t
RZZI
SB2
ZZI
t
RZZI
Deselect or Read Only
ZZ recovery cycle
MIN
2
2
0
t
PUS
MAX
60
2
SB2
. The duration of
DON T CARE
UNITS
cycle
cycle
cycle
Nov. 2003
mA
operation
Normal
cycle
Rev 3.0
TM