K7R163684B_06 SAMSUNG [Samsung semiconductor], K7R163684B_06 Datasheet - Page 3

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K7R163684B_06

Manufacturer Part Number
K7R163684B_06
Description
512Kx36 & 1Mx18 QDRTM II b4 SRAM
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
FUNCTIONAL BLOCK DIAGRAM
FEATURES
K7R163684B
K7R161884B
D(Data in)
ADDRESS
R
W
BW
K
K
C
C
512Kx36-bit, 1Mx18-bit QDR
• 1.8V+0.1V/-0.1V Power Supply.
• DLL circuitry for wide output data valid window and future fre-
• I/O Supply Voltage 1.5V+0.1V/-0.1V for 1.5V I/O,
• Separate independent read and write data ports
• HSTL I/O
• Full data coherency, providing most current data.
• Synchronous pipeline read with self timed late write.
• Registered address, control and data input/output.
• DDR (Double Data Rate) Interface on read and write ports.
• Fixed 4-bit burst for both read and write operation.
• Clock-stop supports to reduce current.
• Two input clocks (K and K) for accurate DDR timing at clock
• Two input clocks for output data (C and C) to minimize
• Two echo clocks (CQ and CQ) to enhance output data
• Single address bus.
• Byte write (x18, x36) function.
• Separate read/write control pin(R and W)
• Simple depth expansion with no data contention.
• Programmable output impedance.
• JTAG 1149.1 compatible test access port.
• 165FBGA(11x15 ball array) with body size of 13mmx15mm.
• Operating in commercial and industrial temperature range.
Notes: 1. Numbers in ( ) are for x18 device
with concurrent read and write operation
quency scaling.
1.8V+0.1V/-0.1V for 1.8V I/O.
rising edges only.
clock-skew and flight-time mismatches.
traceability.
QDR SRAM and Quad Data Rate comprise a new family of products developed by Cypress, Hitachi, IDT, Micron, NEC and Samsung technology.
X
& Lead Free
4 (or 2)
36 (or 18)
17 (or 18)
LOGIC
DATA
CTRL
REG
ADD
REG
GEN
CLK
(or 18)
17
SELECT OUTPUT CONTROL
TM
II b4 SRAM
72(or 36)
WRITE DRIVER
MEMORY
512Kx36
(1Mx18)
ARRAY
512Kx36 & 1Mx18 QDR
- 3 -
* -E(F)C(I)
Organization
E(F) [Package type] : E-Pb Free, F-Pb
C(I) [Operating Temperature] : C-Commercial, I-Industrial
72(or 36)
X36
X18
(or 36)
(or 36)
72
72
K7R163684B-E(F)C(I)30
K7R163684B-E(F)C(I)25
K7R163684B-E(F)C(I)20
K7R163684B-E(F)C(I)16
K7R161884B-E(F)C(I)30
K7R161884B-E(F)C(I)25
K7R161884B-E(F)C(I)20
K7R161884B-E(F)C(I)16
Number
Part
(or 72)
144
Rev. 5.0 July 2006
TM
Cycle
Time
II b4 SRAM
3.3
4.0
5.0
6.0
3.3
4.0
5.0
6.0
(Echo Clock out)
36 (or 18)
Access
Q(Data Out)
CQ, CQ
Time
0.45
0.45
0.45
0.50
0.45
0.45
0.45
0.50
Unit
ns
ns
ns
ns
ns
ns
ns
ns

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