M62334P_08 RENESAS [Renesas Technology Corp], M62334P_08 Datasheet - Page 4

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M62334P_08

Manufacturer Part Number
M62334P_08
Description
8-bit 4ch I2C BUS D/A Converter with Buffer Amplifiers
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
M62334P/FP, M62339P/FP
I
SCL clock frequency
Time the bus must be free before a new transmission can start
Hold time START condition
(After this period, the first clock pulse is generated)
Low period of the clock
High period of the clock
Set-up time for START condition
(Only relevant for a repeated START condition)
Hold time DATA
Set-up time DATA
Rise time of both SDA and SCL lines
Fall time of both SDA and SCL lines
Set-up time for STOP condition
Note:
Timing Chart
REJ03D0866-0400 Rev.4.00 Mar 25, 2008
Page 4 of 9
2
SDA
SCL
C BUS Line Characteristics
V
V
V
V
IH
IH
IL
IL
Transmitter must internally provide at least a hold time to bridge the undefined region (300 ns Max) of the falling
edge of SCL.
Start
t
HD:STA
t
LOW
Item
t
R
t
SU:DAT
, t
F
t
HIGH
t
HD:DAT
t
SU:STA
Start
f
t
t
t
t
t
t
t
t
t
t
SCL
BUF
HD:STA
LOW
HIGH
SU:STA
HD:DAT
SU:DAT
R
F
SU:STO
Symbol
t
SU:STO
Min.
250
4.7
4.0
4.7
4.0
4.7
4.0
0
0
Stop
Max.
1000
t
100
300
BUF
Start
Unit
kHz
µs
µs
µs
µs
µs
µs
ns
ns
ns
µs

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