LH5332600 SHARP [Sharp Electrionic Components], LH5332600 Datasheet

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LH5332600

Manufacturer Part Number
LH5332600
Description
CMOS 32M (4M x 8/2M x 16) MROM
Manufacturer
SHARP [Sharp Electrionic Components]
Datasheet
LH5332600
FEATURES
DESCRIPTION
ROM organized as 4,194,304
2,097,152
by a BYTE input pin. It is fabricated using silicon-gate
CMOS process technology.
The LH5332600 is a 32M-bit mask-programmable
4,194,304
2,097,152
Access time: 100 ns (MAX.)
Supply current:
TTL compatible I/O
Three-state output
Single +5 V power supply
Static operation
Packages:
Others:
(Byte mode: BYTE = V
(Word mode: BYTE = V
– Operating: 100 mA (MAX.)
– Standby: 100 A (MAX.)
44-pin, 600-mil SOP
48-pin, 12 mm
– Non programmable
– Not designed or rated as radiation
– CMOS process (P type silicon
hardened
substrate)
16 bits (Word mode) that can be selected
8 bit organization
16 bit organization
18 mm
8 bits (Byte mode) or
IL
2
IH
)
TSOP (Type I)
)
PIN CONNECTIONS
44-PIN SOP
NOTE: The D
CMOS 32M (4M
data output (D
when the BYTE pin is set to be LOW in byte mode and
Figure 1. SOP Pin Connections
GND
15
A
A
D
OE
D
NC
CE
/A
D
D
D
D
A
A
A
A
A
A
A
D
A
D
18
17
10
11
7
6
5
4
3
2
0
8
2
3
-1
0
9
1
1
pin becomes LSB address input (A
15
1
10
14
16
17
19
2
3
4
5
6
7
8
9
12
13
15
18
20
22
11
21
) when set to be HIGH in word mode.
8/2M
42
40
39
36
26
44
43
38
37
35
34
33
32
30
29
28
27
25
24
23
31
41
A
A
A
A
A
A
A
A
A
A
A
BYTE
GND
D
D
D
D
D
D
D
D
V
11
13
14
CC
20
19
8
9
10
12
15
16
15
7
14
6
13
5
12
4
/A
16) MROM
-1
(NOTE)
TOP VIEW
-1
5332600N-1
)
1

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LH5332600 Summary of contents

Page 1

... Non programmable – Not designed or rated as radiation hardened – CMOS process (P type silicon substrate) DESCRIPTION The LH5332600 is a 32M-bit mask-programmable ROM organized as 4,194,304 8 bits (Byte mode) or 2,097,152 16 bits (Word mode) that can be selected by a BYTE input pin fabricated using silicon-gate CMOS process technology ...

Page 2

... LH5332600 48-PIN TSOP (Type I) BYTE GND NOTE: The ...

Page 3

... BYTE (byte/word) mode select input CE Chip enable input MEMORY MATRIX (4,194,304 x 8) (2,097,152 x 16) COLUMN SELECTOR TIMING SENSE AMPLIFIER GENERATOR ADDRESS BUFFER Figure 3. LH5332600 Block Diagram SIGNAL GND NC LH5332600 ...

Page 4

... LH5332600 TRUTH TABLE BYTE ( NOTES Don’t care; High-Z = High-impedance ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL Supply voltage V CC Input voltage V IN Output voltage V OUT Operating temperature T OPR Storage temperature ...

Page 5

... Input signal fall time 10 ns Input reference level 1.5 V Output reference level 1.5 V Output load condition 1TTL + 100 pF CAUTION It is recommended that a decoupling capacitor be connected between 10 + MIN. MAX. UNIT NOTE 100 ns 100 ns 100 and GND-Pin. CC LH5332600 5 ...

Page 6

... LH5332600 NOTE: The output data becomes valid when the last intervals have concluded. AA ACE NOTE: The output data becomes valid when the last intervals have concluded. AA ACE ...

Page 7

... LH5332600 14.40 [0.567] 2.9 [0.114] 2.5 [0.098] DETAIL 1.275 [0.050] 0.25 [0.010] 0.05 [0.002 0.80 [0.031] 44SOP 17.00 [0.669] 0.20 [0.008] 0.10 [0.004] 1.20 [0.047] MAX. 48TSOP 7 ...

Page 8

... LH5332600 ORDERING INFORMATION LH5332600 X Device Type Package Example: LH5332600N (CMOS 32M ( 16) Mask-Programmable ROM, 44-pin, 600-mil SOP) 8 CMOS 32M (4M x 8/2M x 16) MROM N 44-pin, 600-mil SOP (SOP044-P-0600) T 48-pin TSOP (Type I) (TSOP048-P-1218) CMOS 32M ( 16) Mask-Programmable ROM ...

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