LH5324P00A SHARP [Sharp Electrionic Components], LH5324P00A Datasheet
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LH5324P00A
Related parts for LH5324P00A
LH5324P00A Summary of contents
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... Static operation TTL compatible I/O Three-state outputs Single +5 V power supply Package: 44-pin, 600-mil SOP DESCRIPTION The LH5324P00A is a 24M-bit mask-programmable ROM organized as 3,145,728 8 bits (Byte mode) or 1,572,864 16 bits (Word mode) that can be selected by a BYTE input pin fabricated using silicon-gate CMOS process technology ...
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... COLUMN SELECTOR TIMING SENSE AMPLIFIER GENERATOR ADDRESS BUFFER GND -1 CC Figure 2. LH5324P00A Block Diagram NOTE SIGNAL GND NC ) when the BYTE pin is set to be LOW in byte mode, and data output (D –1 CMOS 24M Mask-Programmable ROM 31 D ...
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... 2 OUT 150 – 0 MHz LH5324P00A SUPPLY NOTE CURRENT Standby ( Operating ( Operating ( Operating ( Operating ( MAX. UNIT NOTE ...
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... LH5324P00A AC CHARACTERISTICS (V CC PARAMETER SYMBOL Read cycle time t RC Address access time t AA Chip enable access time t ACE Output enable delay time t OE Output hold time output in High-Z t CHZ OE to output in High-Z t OHZ NOTE: 1. This is the time required for the outputs to become high-impedance. ...
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... AA ACE OE PRELIMINARY (NOTE) t ACE (NOTE (NOTE) DATA VALID Figure 3. Byte Mode (BYTE = (NOTE) t ACE (NOTE (NOTE) DATA VALID Figure 4. Word Mode (BYTE = V IH LH5324P00A t CHZ t OHZ t OH 5324P00A CHZ t OHZ t OH 5324P00A-4 ) 5-311 ...
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... MAXIMUM LIMIT DIMENSIONS IN MM [INCHES] MINIMUM LIMIT ORDERING INFORMATION LH5324P00A N Device Type Package Example: LH5324P00AN (CMOS 24M ( 1.5M x 16) Mask-Programmable ROM, 44-pin, 600-mil SOP) 5-312 PRELIMINARY CMOS 24M Mask-Programmable ROM 23 13.40 [0.528] 16.40 [0.646] 13.00 [0.512] 15.60 [0.614] SEE 22 DETAIL 0.20 [0.008] ...