LUCL8574DP-D AGERE [Agere Systems], LUCL8574DP-D Datasheet - Page 26

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LUCL8574DP-D

Manufacturer Part Number
LUCL8574DP-D
Description
L8574D Resistive Subscriber Line Interface Circuit(SLIC), Ring Relay,and Protector(SRP)for Long Loop and TR-57 Applications
Manufacturer
AGERE [Agere Systems]
Datasheet
L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring
Relay, and Protector (SRP) for Long Loop and TR-57 Applications
Applications
On-Hook Transmission
During the on-hook transmission and talk/on-hook
transmission states, the L8574 provides 750 A dc bias
current out of the Tip/Ring current driver amplifiers.
This creates a dc voltage drop across the external 19.6
k resistors, R
cient dc bias to support on-hook transmission. The
switchhook detector is adjusted to compensate for this
dc bias current. The L8574 is able to support on-hook
transmission to drive a 3.17 dBm signal into a 600
900
vide an ac path so transmission is not distorted by
R
settling time transition from on- to off-hook.
Parallel Data Interface
A 6-wire parallel interface (CE, CS, B0, B1, B2, and B3)
is used to pass control information from the control
logic on the line card to the L8574. The L8574 has
eight operating states. These states are selected using
three logic input bits, B0—B2, according to the truth
table shown in Table 14. Logic input B3 operates a
relay driver independent of the state of bits B0—B2.
Data on the parallel data bus, B0—B3, is loaded into a
4-bit latch on the L8574 on the low-to-high transition of
the channel select lead CS. Changes in the data at
inputs B0—B3 do not affect the L8574 while CS is
either low or high. A low on channel enable lead CE
asynchronously resets the 4-bit latch to 1111 (scan
state with the relay driver off) and disables the channel
select lead CS (i.e., CS is prevented from loading any
data into the 4-bit latch). A high on CE enables CS.
State transitions and delays between transitions are left
to the discretion of the user since, except for fault con-
ditions, the state of the L8574 depends only on the
external control provided through the logic interface.
Supervision
The L8574 offers the ring trip, loop closure, and ther-
mal shutdown functions. The status of these functions
are provided as device outputs. The outputs of the ring
trip and off-hook supervision detectors are multiplexed
into a single output called NSTAT. The device state
determines which output is connected to NSTAT. The
device state table, Table 14, details which supervision
output (loop closure or ring trip) is seen at NSTAT dur-
ing a given device state.
26
26
BIAS1
ac loop. The capacitors, C
and R
BIAS2
BIAS1
. Zener diode, D
(continued)
and R
BIAS2
, which provides suffi-
BIAS1
SPEED
and C
, reduces the
BIAS2
, pro-
or
Detector values are independent of office battery and
are valid over the entire range of V
ever, NSTAT must indicate an on-hook (NSTAT = 1) if
either V
its dc source and an off-hook (NSTAT = 0) if the L8574
is in thermal shutdown. V
disconnected depending on the voltage at the power
supply pins as follows (the pins of supplies which have
more than one pin are shorted together):
If V
V
If V
The status of the thermal shutdown circuit is output on
B3 when CS is high (thermal shutdown = 0 V).
Off-Hook Detection
The off-hook or loop closure threshold on the L8574
SLIC is internally fixed. Off-hook is indicated (NSTAT =
0) if the loop resistance is a maximum 2700 . On-
hook is indicated (NSTAT = 1) if the loop resistance is a
minimum 4400 .
Ring Trip
The ring trip threshold is set by resistor R
tor module. With R
teed to ring trip up to 1840 . With a 20 Hz ringing
source, the trip time is guaranteed less than 200 ms.
The ring trip circuit assumes uses of battery-backed
ringing. Pretrip immunity is such that a load across
Tip and Ring of 10 k in parallel with an 8 F capacitor
will not cause ring trip. Three external components
are required for ring trip, a 1 M resistor from R
V
to V
components required for ring trip circuit are shown in
Figure 9. Note that R
module. All other components are discrete.
BAT2
BF
–10 V, then NSTAT must be on-hook (NSTAT = 1).
, resistor R
BAT1
BAT1
BF
, and a 0.1 F capacitor from R
BAT1
–20 V, then NSTAT must operate normally.
–10 V (i.e., more positive than –10 V) or V
–20 V (i.e., more negative than –20 V) and
or V
Figure 9. Ring Trip Threshold
10
600
1 M
R
BAT2
, which is a 600
10
10
0.1 F
is disconnected (open circuit) from
set to 600 , the circuit is guaran-
10
is implemented in the resistor
BAT1
and V
Lucent Technologies Inc.
V
RSW
RTS
BF
BAT1
resistor from R
BAT2
SW
October 1998
and V
are defined as
to R
L8574
Data Sheet
10
in the resis-
TS
BAT2
. The
TS
. How-
5-5276 (F)
SW
to
BAT2

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