HCTS4002D INTERSIL [Intersil Corporation], HCTS4002D Datasheet

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HCTS4002D

Manufacturer Part Number
HCTS4002D
Description
Radiation Hardened Dual 4-Input NOR Gate
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet
August 1995
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
Features
• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm
• Single Event Upset (SEU) Immunity < 2 x 10
• Dose Rate Survivability: >1 x 10
• Dose Rate Upset >10
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• LSTTL Input Compatibility
• Input Current Levels Ii
Description
The Intersil HCTS4002MS is a Radiation Hardened Dual 4-Input
NOR Gate. A high on any input forces the output to a low state.
The HCTS4002MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCTS4002MS is supplied in a 14 lead Ceramic flatpack (K
suffix) or a SBDIP Package (D suffix).
Ordering Information
HCTS4002DMSR
HCTS4002KMSR
HCTS4002D/
Sample
HCTS4002K/
Sample
HCTS4002HMSR
(Typ)
- VIL = 0.8V Max
- VIH = VCC/2 Min
NUMBER
PART
TEMPERATURE
-55
-55
o
o
RANGE
C to +125
C to +125
+25
+25
+25
10
RAD (Si)/s 20ns Pulse
o
o
o
C
C
C
5 A at VOL, VOH
|
Copyright
o
o
C
C
12
Intersil Class
S Equivalent
Intersil Class
S Equivalent
Sample
Sample
Die
o
SCREENING
C to +125
©
RAD (Si)/s
LEVEL
Intersil Corporation 1999
o
-9
C
2
/mg
Errors/Bit-Day
14 Lead SBDIP
14 Lead
Ceramic
Flatpack
14 Lead SBDIP
14 Lead
Ceramic
Flatpack
Die
PACKAGE
HCTS4002MS
718
Pinouts
Functional Diagram
NOTE: L = Logic Level Low, H = Logic level High,
14 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE
GND
NC
A1
B1
C1
D1
Y1
An
H
L
X
X
X
An
Bn
Cn
Dn
14 LEAD CERAMIC DUAL-IN-LINE METAL SEAL
PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T14
X = Don’t Care
(FLATPACK) MIL-STD-1835 CDFP3-F14
Bn
H
X
X
X
L
GND
INPUTS
NC
Y1
A1
B1
C1
D1
1
2
3
4
5
6
7
Dual 4-Input NOR Gate
TRUTH TABLE
1
2
3
4
5
6
7
Cn
X
X
H
X
L
TOP VIEW
TOP VIEW
Radiation Hardened
Dn
X
X
X
H
L
Spec Number
14
13
12
11
10
9
8
File Number
14
13
12
11
10
9
8
VCC
Y2
D2
C2
B2
A2
NC
OUTPUTS
Yn
H
L
L
L
L
518632
3075.1
Yn
VCC
Y2
D2
C2
B2
A2
NC

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HCTS4002D Summary of contents

Page 1

... SBDIP Package (D suffix). Ordering Information PART TEMPERATURE NUMBER RANGE o o HCTS4002DMSR - +125 HCTS4002KMSR - +125 C o HCTS4002D/ +25 C Sample o HCTS4002K/ +25 C Sample o HCTS4002HMSR +25 C CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. | http://www.intersil.com or 407-727-9207 Copyright HCTS4002MS Pinouts ...

Page 2

Absolute Maximum Ratings Supply Voltage (VCC -0.5 to +7.0V Input Voltage Range, All Inputs . ...

Page 3

TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER SYMBOL Input to Output TPHL, VCC = 4.5V TPLH NOTES: 1. All voltages referenced to device GND measurements assume RL = 500 , CL = 50pF, Input ...

Page 4

TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25 PARAMETER ICC IOL/IOH CONFORMANCE GROUPS Initial Test (Preburn-In) Interim Test I (Postburn-In) Interim Test II (Postburn-In) PDA Interim Test III (Postburn-In) PDA Final Test Group A (Note 1) Group B ...

Page 5

TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONNECTIONS OPEN GROUND STATIC BURN-IN I TEST CONNECTIONS (Note STATIC BURN-IN II TEST CONNECTIONS (Note ...

Page 6

Intersil Space Level Product Flow - ‘MS’ Wafer Lot Acceptance (All Lots) Method 5007 (Includes SEM) GAMMA Radiation Verification (Each Wafer) Method 1019, 4 Samples/Wafer, 0 Rejects 100% Nondestructive Bond Pull, Method 2023 Sample - Wire Bond Pull Monitor, Method ...

Page 7

AC Timing Diagrams VIH INPUT VS VIL TPLH VOH VS OUTPUT VOL TTLH VOH 80% 20% OUTPUT VOL AC VOLTAGE LEVELS PARAMETER HCTS VCC 4.50 VIH 3.00 VS 1.30 VIL 0 GND 0 HCTS4002MS AC Load Circuit TPHL TTHL 80% ...

Page 8

Die Characteristics DIE DIMENSIONS mils 2.20mm x 2.24mm METALLIZATION: Type: SiAl Å Å Metal Thickness: 11k 1k GLASSIVATION: Type: SiO 2 Å Å Thickness: 13k 2.6k WORST CASE CURRENT DENSITY <2 A/cm BOND ...

Page 9

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, ...

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