EDD1232AABH ELPIDA [Elpida Memory], EDD1232AABH Datasheet - Page 37

• Manufacturer Part Number: EDD1232AABH
• Description: 128M bits DDR SDRAM (4M words x 32 bits)
• Manufacturer: ELPIDA [Elpida Memory]

READ to PRECHARGE Command Interval (same bank): To stop output data
A burst data output can be interrupted with a precharge command. All DQ pins and DQS pins become High-Z tHZP
(= CL) after the precharge command.
READ to PRECHARGE Command Interval (same bank): To stop output data (CL = 3, BL = 2, 4, 8)
Data Sheet E0533E50 (Ver. 5.0)
Command
Command
Command
READ to PRECHARGE Command Interval (same bank): To stop output data (CL = 2.5, BL = 2, 4, 8)
READ to PRECHARGE Command Interval (same bank): To stop output data (CL = 2, BL = 2, 4, 8)
DQS
DQS
DQS
/CK
DQ
/CK
/CK
CK
DQ
DQ
CK
CK
t0
t0
t0
NOP
NOP
NOP
t1
t1
t1
READ
READ
READ
t2
t2
t2
PRE/PALL
PRE/PALL
PRE/PALL
CL = 2.5
t3
t3
t3
CL = 3
tHZP
37
t4
t4
t4
out0 out1
tHZP
tHZP
out0 out1
t5
t5
t5
out0 out1
t6
t6
t6
NOP
NOP
NOP
High-Z
High-Z
t7
t7
t7
High-Z
High-Z
High-Z
High-Z
EDD1232AABH
t8
t8
t8